2010-01-21 02:19:32 +09:00
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/*
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* (C) Copyright 2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx51_pins.h>
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#include <asm/arch/iomux.h>
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2010-03-06 01:54:37 +09:00
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#include <asm/arch/sys_proto.h>
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2010-01-21 02:19:32 +09:00
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/* IOMUX register (base) addresses */
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enum iomux_reg_addr {
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IOMUXGPR0 = IOMUXC_BASE_ADDR,
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IOMUXGPR1 = IOMUXC_BASE_ADDR + 0x004,
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IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR,
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IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + MUX_I_END,
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IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + PAD_I_START,
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IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR,
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};
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#define MUX_PIN_NUM_MAX (((MUX_I_END - MUX_I_START) >> 2) + 1)
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/* Get the iomux register address of this pin */
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static inline u32 get_mux_reg(iomux_pin_name_t pin)
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{
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u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
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if (is_soc_rev(CHIP_REV_2_0) < 0) {
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/*
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* Fixup register address:
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* i.MX51 TO1 has offset with the register
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* which is define as TO2.
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*/
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if ((pin == MX51_PIN_NANDF_RB5) ||
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(pin == MX51_PIN_NANDF_RB6) ||
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(pin == MX51_PIN_NANDF_RB7))
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; /* Do nothing */
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else if (mux_reg >= 0x2FC)
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mux_reg += 8;
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else if (mux_reg >= 0x130)
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mux_reg += 0xC;
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}
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mux_reg += IOMUXSW_MUX_CTL;
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return mux_reg;
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}
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/* Get the pad register address of this pin */
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static inline u32 get_pad_reg(iomux_pin_name_t pin)
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{
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u32 pad_reg = PIN_TO_IOMUX_PAD(pin);
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if (is_soc_rev(CHIP_REV_2_0) < 0) {
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/*
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* Fixup register address:
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* i.MX51 TO1 has offset with the register
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* which is define as TO2.
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*/
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if ((pin == MX51_PIN_NANDF_RB5) ||
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(pin == MX51_PIN_NANDF_RB6) ||
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(pin == MX51_PIN_NANDF_RB7))
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; /* Do nothing */
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else if (pad_reg == 0x4D0 - PAD_I_START)
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pad_reg += 0x4C;
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else if (pad_reg == 0x860 - PAD_I_START)
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pad_reg += 0x9C;
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else if (pad_reg >= 0x804 - PAD_I_START)
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pad_reg += 0xB0;
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else if (pad_reg >= 0x7FC - PAD_I_START)
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pad_reg += 0xB4;
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else if (pad_reg >= 0x4E4 - PAD_I_START)
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pad_reg += 0xCC;
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else
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pad_reg += 8;
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}
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pad_reg += IOMUXSW_PAD_CTL;
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return pad_reg;
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}
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/* Get the last iomux register address */
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static inline u32 get_mux_end(void)
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{
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if (is_soc_rev(CHIP_REV_2_0) < 0)
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return IOMUXC_BASE_ADDR + (0x3F8 - 4);
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else
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return IOMUXC_BASE_ADDR + (0x3F0 - 4);
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}
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/*
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* This function is used to configure a pin through the IOMUX module.
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* @param pin a pin number as defined in iomux_pin_name_t
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* @param cfg an output function as defined in iomux_pin_cfg_t
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*
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* @return 0 if successful; Non-zero otherwise
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*/
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static void iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
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{
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u32 mux_reg = get_mux_reg(pin);
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if ((mux_reg > get_mux_end()) || (mux_reg < IOMUXSW_MUX_CTL))
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return ;
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if (cfg == IOMUX_CONFIG_GPIO)
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writel(PIN_TO_ALT_GPIO(pin), mux_reg);
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else
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writel(cfg, mux_reg);
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}
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/*
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* Request ownership for an IO pin. This function has to be the first one
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* being called before that pin is used. The caller has to check the
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* return value to make sure it returns 0.
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*
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* @param pin a name defined by iomux_pin_name_t
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* @param cfg an input function as defined in iomux_pin_cfg_t
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*
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*/
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void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
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{
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iomux_config_mux(pin, cfg);
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}
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/*
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* Release ownership for an IO pin
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*
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* @param pin a name defined by iomux_pin_name_t
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* @param cfg an input function as defined in iomux_pin_cfg_t
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*/
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void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
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{
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}
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/*
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* This function configures the pad value for a IOMUX pin.
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*
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* @param pin a pin number as defined in iomux_pin_name_t
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* @param config the ORed value of elements defined in iomux_pad_config_t
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*/
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void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
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{
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u32 pad_reg = get_pad_reg(pin);
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writel(config, pad_reg);
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}
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unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)
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{
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u32 pad_reg = get_pad_reg(pin);
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return readl(pad_reg);
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}
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