mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-18 07:58:52 +09:00
191 lines
5.3 KiB
Plaintext
191 lines
5.3 KiB
Plaintext
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/*
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* Copyright 2017 Logic PD, Inc.
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* Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "imx6qdl-logicpd.dtsi"
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/ {
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model = "Logic PD i.MX6QDL SOM";
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compatible = "fsl,imx6q";
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reg_usb_otg_vbus: regulator-otg-vbus@0 {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_h1_vbus: regulator-usbh1vbus@1 {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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reg_3v3: regulator-3v3@2 {
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compatible = "regulator-fixed";
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regulator-name = "reg_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&usbh1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh1>;
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vbus-supply = <®_usb_h1_vbus>;
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status = "okay";
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};
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&usbh2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh2>;
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phy_type = "hsic";
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disable-over-current;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rmii";
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phy-speed = <10>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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keep-power-in-suspend;
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status = "okay";
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};
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&iomuxc {
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 /* nINT */
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MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 /* Ethernet Reset */
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>;
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};
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pinctrl_gpio_leds: gpioledsgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x130b0
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MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x130b0
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MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x130b0
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbh1: usbh1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* USB_H1_PWR_EN */
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>;
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};
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pinctrl_usbh2: usbh2grp {
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fsl,pins = <
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MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x17030
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MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x13030
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 /* USB_OTG_PWR_EN */
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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};
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