2018-05-07 06:58:06 +09:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2010-07-16 06:49:03 +09:00
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/*
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2011-01-07 14:42:19 +09:00
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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2010-07-16 06:49:03 +09:00
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*/
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/*
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* P4080 DS board configuration file
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2012-08-14 19:14:51 +09:00
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* Also supports P4040 DS
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2010-07-16 06:49:03 +09:00
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*/
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2011-08-31 23:50:13 +09:00
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#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
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#define CONFIG_PCIE3
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2013-11-08 11:46:44 +09:00
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#define CONFIG_SYS_SATA_MAX_DEVICE 2
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#define CONFIG_LBA48
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2012-10-05 18:48:53 +09:00
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_SRIO2 /* SRIO port 2 */
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2013-05-07 17:30:46 +09:00
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#define CONFIG_SRIO_PCIE_BOOT_MASTER
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2010-10-01 05:47:16 +09:00
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#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
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2010-07-16 06:49:03 +09:00
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#include "corenet_ds.h"
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