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https://github.com/brain-hackers/u-boot-brain
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113 lines
3.0 KiB
C
113 lines
3.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Inter-Processor Communication with the Platform Management Unit (PMU)
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* firmware.
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*
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* (C) Copyright 2019 Luca Ceresoli
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* Luca Ceresoli <luca@lucaceresoli.net>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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/* IPI bitmasks, register base and register offsets */
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#define IPI_BIT_MASK_APU 0x00001
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#define IPI_BIT_MASK_PMU0 0x10000
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#define IPI_REG_BASE_APU 0xFF300000
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#define IPI_REG_BASE_PMU0 0xFF330000
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#define IPI_REG_OFFSET_TRIG 0x00
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#define IPI_REG_OFFSET_OBR 0x04
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/* IPI mailbox buffer offsets */
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#define IPI_BUF_BASE_APU 0xFF990400
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#define IPI_BUF_OFFSET_TARGET_PMU 0x1C0
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#define IPI_BUF_OFFSET_REQ 0x00
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#define IPI_BUF_OFFSET_RESP 0x20
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#define PMUFW_PAYLOAD_ARG_CNT 8
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/* PMUFW commands */
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#define PMUFW_CMD_SET_CONFIGURATION 2
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static void pmu_ipc_send_request(const u32 *req, size_t req_len)
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{
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u32 *mbx = (u32 *)(IPI_BUF_BASE_APU +
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IPI_BUF_OFFSET_TARGET_PMU +
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IPI_BUF_OFFSET_REQ);
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size_t i;
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for (i = 0; i < req_len; i++)
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writel(req[i], &mbx[i]);
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}
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static void pmu_ipc_read_response(unsigned int *value, size_t count)
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{
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u32 *mbx = (u32 *)(IPI_BUF_BASE_APU +
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IPI_BUF_OFFSET_TARGET_PMU +
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IPI_BUF_OFFSET_RESP);
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size_t i;
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for (i = 0; i < count; i++)
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value[i] = readl(&mbx[i]);
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}
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/**
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* Send request to PMU and get the response.
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*
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* @req: Request buffer. Byte 0 is the API ID, other bytes are optional
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* parameters.
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* @req_len: Request length in number of 32-bit words.
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* @res: Response buffer. Byte 0 is the error code, other bytes are
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* optional parameters. Optional, if @res_maxlen==0 the parameters
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* will not be read.
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* @res_maxlen: Space allocated for the response in number of 32-bit words.
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*
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* @return Error code returned by the PMU (i.e. the first word of the response)
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*/
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static int pmu_ipc_request(const u32 *req, size_t req_len,
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u32 *res, size_t res_maxlen)
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{
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u32 status;
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if (req_len > PMUFW_PAYLOAD_ARG_CNT ||
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res_maxlen > PMUFW_PAYLOAD_ARG_CNT)
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return -EINVAL;
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pmu_ipc_send_request(req, req_len);
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/* Raise Inter-Processor Interrupt to PMU and wait for response */
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writel(IPI_BIT_MASK_PMU0, IPI_REG_BASE_APU + IPI_REG_OFFSET_TRIG);
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do {
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status = readl(IPI_REG_BASE_APU + IPI_REG_OFFSET_OBR);
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} while (status & IPI_BIT_MASK_PMU0);
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pmu_ipc_read_response(res, res_maxlen);
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return 0;
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}
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/**
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* Send a configuration object to the PMU firmware.
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*
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* @cfg_obj: Pointer to the configuration object
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* @size: Size of @cfg_obj in bytes
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*/
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void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size)
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{
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const u32 request[] = {
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PMUFW_CMD_SET_CONFIGURATION,
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(u32)((u64)cfg_obj)
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};
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u32 response;
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int err;
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printf("Loading PMUFW cfg obj (%ld bytes)\n", size);
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err = pmu_ipc_request(request, ARRAY_SIZE(request), &response, 1);
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if (err)
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panic("Cannot load PMUFW configuration object (%d)\n", err);
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if (response != 0)
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panic("PMUFW returned 0x%08x status!\n", response);
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}
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