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u-boot-brain/board/freescale/corenet_ds/MAINTAINERS

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Add board MAINTAINERS files We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 14:08:18 +09:00
CORENET_DS BOARD
MAINTAINERS: comment out blank M: field Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4 (patman: RunPipe() should not pipe stdout/stderr unless asked), Patman spits lots of "Invalid MAINTAINERS address: '-'" error messages for patches with global changes. It takes too long for Patman to process them. Anyway, "M: -" does not carry any important information. Rather, it is just like a place holder in case of assigning a new board maintainer. Let's comment out. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-16 14:11:51 +09:00
#M: -
Add board MAINTAINERS files We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 14:08:18 +09:00
S: Maintained
F: board/freescale/corenet_ds/
F: include/configs/P3041DS.h
F: configs/P3041DS_defconfig
F: configs/P3041DS_NAND_defconfig
F: configs/P3041DS_SDCARD_defconfig
F: configs/P3041DS_SPIFLASH_defconfig
F: configs/P3041DS_SRIO_PCIE_BOOT_defconfig
F: include/configs/P4080DS.h
F: configs/P4080DS_defconfig
F: configs/P4080DS_SDCARD_defconfig
F: configs/P4080DS_SPIFLASH_defconfig
F: configs/P4080DS_SRIO_PCIE_BOOT_defconfig
F: include/configs/P5040DS.h
F: configs/P5040DS_defconfig
F: configs/P5040DS_NAND_defconfig
F: configs/P5040DS_SDCARD_defconfig
F: configs/P5040DS_SPIFLASH_defconfig
powerpc/mpc85xx: SECURE BOOT- Add secure boot target for P5040DS Secure boot target is added for P5040DS platform. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-03 17:47:50 +09:00
F: configs/P5040DS_SECURE_BOOT_defconfig
powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-06-16 14:06:00 +09:00
CORENET_DS_SECURE_BOOT BOARD
board/freescale: Update MAINTAINERS files Update maintainers for secure boot targets. Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-30 00:46:49 +09:00
M: Ruchika Gupta <ruchika.gupta@nxp.com>
powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-06-16 14:06:00 +09:00
S: Maintained
F: configs/P3041DS_NAND_SECURE_BOOT_defconfig
powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040 Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-06-16 14:06:30 +09:00
F: configs/P5040DS_NAND_SECURE_BOOT_defconfig
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