mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 05:06:16 +09:00
71 lines
1.3 KiB
Plaintext
71 lines
1.3 KiB
Plaintext
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/*
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* (C) Copyright 2013 SAMSUNG Electronics
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* SAMSUNG EXYNOS5420 SoC device tree source
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/include/ "exynos5.dtsi"
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/ {
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config {
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machine-arch-id = <4151>;
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};
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i2c@12ca0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CA0000 0x100>;
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interrupts = <0 60 0>;
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};
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i2c@12cb0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CB0000 0x100>;
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interrupts = <0 61 0>;
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};
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i2c@12cc0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CC0000 0x100>;
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interrupts = <0 62 0>;
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};
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i2c@12cd0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CD0000 0x100>;
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interrupts = <0 63 0>;
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};
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i2c@12e00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E00000 0x100>;
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interrupts = <0 87 0>;
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};
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i2c@12e10000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E10000 0x100>;
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interrupts = <0 88 0>;
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};
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i2c@12e20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E20000 0x100>;
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interrupts = <0 203 0>;
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};
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};
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