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u-boot-brain/drivers/clk/kendryte/Kconfig

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clk: Add K210 pll support This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson <seanga2@gmail.com> CC: Lukasz Majewski <lukma@denx.de>
2020-06-24 19:41:09 +09:00
config CLK_K210
bool "Clock support for Kendryte K210"
clk: Add K210 clock support Due to the large number of clocks, I decided to use the CCF. The overall structure is modeled after the imx code. Clocks parameters are stored in several arrays, and are then instantiated at run-time. There are some translation macros (FOOIFY()) which allow for more dense packing. Signed-off-by: Sean Anderson <seanga2@gmail.com> CC: Lukasz Majewski <lukma@denx.de>
2020-06-24 19:41:11 +09:00
depends on CLK && CLK_CCF && CLK_COMPOSITE_CCF
clk: Add K210 pll support This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson <seanga2@gmail.com> CC: Lukasz Majewski <lukma@denx.de>
2020-06-24 19:41:09 +09:00
help
This enables support clock driver for Kendryte K210 platforms.
config CLK_K210_SET_RATE
bool "Enable setting the Kendryte K210 PLL rate"
depends on CLK_K210
help
Add functionality to calculate new rates for K210 PLLs. Enabling this
feature adds around 1K to U-Boot's final size.
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