u-boot-brain/arch/arm/mach-omap2/omap5/Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.

obj-y	+= boot.o
obj-y	+= hwinit.o
obj-y	+= emif.o
obj-y	+= sdram.o
obj-y	+= prcm-regs.o
obj-y	+= hw_data.o
obj-y	+= abb.o
obj-y	+= fdt.o
obj-$(CONFIG_IODELAY_RECALIBRATION) += dra7xx_iodelay.o
obj-$(CONFIG_DRA7XX) += sec_entry_cpu1.o
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-07 06:58:06 +09:00			`# SPDX-License-Identifier: GPL-2.0+`
omap5: Add minimal support for omap5430. This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> 2011-11-15 23:49:55 +09:00			`#`
			`# (C) Copyright 2000-2010`
			`# Wolfgang Denk, DENX Software Engineering, wd@denx.de.`

omap5: Definitions for SYS_BOOT-based fallback boot device selection This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> 2015-07-15 23:02:26 +09:00			`obj-y += boot.o`
armv7: convert makefiles to Kbuild style Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> 2013-10-17 17:34:48 +09:00			`obj-y += hwinit.o`
			`obj-y += emif.o`
			`obj-y += sdram.o`
			`obj-y += prcm-regs.o`
			`obj-y += hw_data.o`
			`obj-y += abb.o`
ARM: omap5: add hooks for cpu/SoC fdt fixups Adds an fdt.c file in that defines the ft_cpu_setup() function, which should be called from a board-specific ft_board_setup()). This ft_cpu_setup() will currently do nothing for non-secure (GP) devices but contains pertinent updates for booting on secure (HS) devices. Update the omap5 Makefile to include the fdt.c in the build. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> 2016-05-20 09:10:53 +09:00			`obj-y += fdt.o`
ARM: DRA7: Add support for IO delay configuration On DRA7, in addition to the regular muxing of pins, an additional hardware module called IODelay which is also expected to be configured. This "IODelay" module has it's own register space that is independent of the control module. It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay recalibration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do muxing as part of IOdelay recalibration. IODELAY recalibration sequence: - Complete AVS voltage change on VDD_CORE_L - Unlock IODLAY config registers. - Perform IO delay calibration with predefined values. - Isolate all the IOs - Update the delay mechanism for each IO with new calibrated values. - Configure PAD configuration registers - De-isolate all the IOs. - Relock IODELAY config registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> 2015-06-04 20:12:36 +09:00			`obj-$(CONFIG_IODELAY_RECALIBRATION) += dra7xx_iodelay.o`
arm: omap5: Add function to make an SMC call on cpu1 On DRA7xx platform, CPU Core 1 is not used in u-boot. However, in some cases it is need to make secure API calls from Core 1. This patch adds an assembly function to make a secure (SMC) call from CPU Core #1. Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> 2016-11-30 07:33:22 +09:00			`obj-$(CONFIG_DRA7XX) += sec_entry_cpu1.o`