mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 06:33:45 +09:00
142 lines
3.3 KiB
Plaintext
142 lines
3.3 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/dts-v1/;
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#include "k3-j721e-som-p0.dtsi"
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/ {
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aliases {
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remoteproc0 = &sysctrler;
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remoteproc1 = &a72_0;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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tick-timer = &timer1;
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};
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a72_0: a72@0 {
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compatible = "ti,am654-rproc";
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reg = <0x0 0x00a90000 0x0 0x10>;
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power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
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resets = <&k3_reset 202 0>;
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assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
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assigned-clock-rates = <2000000000>, <200000000>;
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ti,sci = <&dmsc>;
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ti,sci-proc-id = <32>;
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ti,sci-host-id = <10>;
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u-boot,dm-spl;
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};
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clk_200mhz: dummy_clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <200000000>;
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u-boot,dm-spl;
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};
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};
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&cbass_mcu_wakeup {
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mcu_secproxy: secproxy@28380000 {
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u-boot,dm-spl;
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compatible = "ti,am654-secure-proxy";
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reg = <0x0 0x2a380000 0x0 0x80000>,
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<0x0 0x2a400000 0x0 0x80000>,
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<0x0 0x2a480000 0x0 0x80000>;
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reg-names = "rt", "scfg", "target_data";
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#mbox-cells = <1>;
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};
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sysctrler: sysctrler {
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u-boot,dm-spl;
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compatible = "ti,am654-system-controller";
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mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
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mbox-names = "tx", "rx";
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};
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};
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&dmsc {
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mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
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mbox-names = "tx", "rx", "notify";
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ti,host-id = <4>;
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ti,secure-host;
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};
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&wkup_pmx0 {
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wkup_uart0_pins_default: wkup_uart0_pins_default {
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u-boot,dm-spl;
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
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J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
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>;
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};
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mcu_uart0_pins_default: mcu_uart0_pins_default {
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u-boot,dm-spl;
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
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J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
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J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
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J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
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>;
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};
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};
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&main_pmx0 {
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main_uart0_pins_default: main_uart0_pins_default {
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u-boot,dm-spl;
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pinctrl-single,pins = <
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J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
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J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
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J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
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J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
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>;
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};
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};
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&wkup_uart0 {
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u-boot,dm-spl;
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "okay";
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};
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&mcu_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_uart0_pins_default>;
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status = "okay";
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};
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&main_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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status = "okay";
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power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
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};
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&main_sdhci0 {
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/delete-property/ power-domains;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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clock-names = "clk_xin";
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clocks = <&clk_200mhz>;
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ti,driver-strength-ohm = <50>;
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non-removable;
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bus-width = <8>;
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};
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&main_sdhci1 {
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/delete-property/ power-domains;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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clock-names = "clk_xin";
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clocks = <&clk_200mhz>;
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ti,driver-strength-ohm = <50>;
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};
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#include "k3-j721e-common-proc-board-u-boot.dtsi"
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