u-boot-brain/arch/x86/include/asm/intel_regs.h

/*
 * Copyright (c) 2016 Google, Inc
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#ifndef __ASM_INTEL_REGS_H
#define __ASM_INTEL_REGS_H

/* Access the memory-controller hub */
#define MCH_BASE_ADDRESS	0xfed10000
#define MCH_BASE_SIZE		0x8000
#define MCHBAR_REG(reg)		(MCH_BASE_ADDRESS + (reg))

/* Access the Root Complex Register Block */
#define RCB_BASE_ADDRESS	0xfed1c000
#define RCB_REG(reg)		(RCB_BASE_ADDRESS + (reg))

#endif
x86: Create a common header for Intel register access There are several blocks of registers that are accessed from all over the code on Intel CPUs. These don't currently have their own driver and it is not clear whether having a driver makes sense. An example is the Memory Controller Hub (MCH). We map it to a known location on some Intel chips (mostly those without FSP - Firmware Support Package). Add a new header file for these registers, and move MCH into it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 14:06:55 +09:00			`/*`
			`* Copyright (c) 2016 Google, Inc`
			`*`
			`* SPDX-License-Identifier: GPL-2.0`
			`*/`

			`#ifndef __ASM_INTEL_REGS_H`
			`#define __ASM_INTEL_REGS_H`

			`/* Access the memory-controller hub */`
			`#define MCH_BASE_ADDRESS 0xfed10000`
			`#define MCH_BASE_SIZE 0x8000`
			`#define MCHBAR_REG(reg) (MCH_BASE_ADDRESS + (reg))`

x86: Add the root-complex block to common intel registers This is similar to MCH in that it is used in various drivers. Add it to the common header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 14:06:56 +09:00			`/* Access the Root Complex Register Block */`
			`#define RCB_BASE_ADDRESS 0xfed1c000`
			`#define RCB_REG(reg) (RCB_BASE_ADDRESS + (reg))`

x86: Create a common header for Intel register access There are several blocks of registers that are accessed from all over the code on Intel CPUs. These don't currently have their own driver and it is not clear whether having a driver makes sense. An example is the Memory Controller Hub (MCH). We map it to a known location on some Intel chips (mostly those without FSP - Firmware Support Package). Add a new header file for these registers, and move MCH into it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 14:06:55 +09:00			`#endif`