mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 01:48:52 +09:00
181 lines
3.8 KiB
C
181 lines
3.8 KiB
C
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/*
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* Copyright (C) 2012-2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/board.h>
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#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
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#define PFC_MICRO_SUPPORT_CARD_RESET \
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((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034)
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#define PFC_MICRO_SUPPORT_CARD_REVISION \
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((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0)
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/*
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* 0: reset deassert, 1: reset
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*
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* bit[0]: LAN, I2C, LED
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* bit[1]: UART
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*/
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void support_card_reset_deassert(void)
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{
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writel(0, PFC_MICRO_SUPPORT_CARD_RESET);
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}
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void support_card_reset(void)
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{
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writel(3, PFC_MICRO_SUPPORT_CARD_RESET);
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}
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static int support_card_show_revision(void)
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{
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u32 revision;
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revision = readl(PFC_MICRO_SUPPORT_CARD_REVISION);
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printf("(PFC CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
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return 0;
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}
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#endif
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#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
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#define DCC_MICRO_SUPPORT_CARD_RESET_LAN \
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((CONFIG_SUPPORT_CARD_BASE) + 0x00401300)
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#define DCC_MICRO_SUPPORT_CARD_RESET_UART \
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((CONFIG_SUPPORT_CARD_BASE) + 0x00401304)
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#define DCC_MICRO_SUPPORT_CARD_RESET_I2C \
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((CONFIG_SUPPORT_CARD_BASE) + 0x00401308)
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#define DCC_MICRO_SUPPORT_CARD_REVISION \
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((CONFIG_SUPPORT_CARD_BASE) + 0x005000E0)
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void support_card_reset_deassert(void)
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{
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writel(1, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
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writel(1, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
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writel(1, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
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}
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void support_card_reset(void)
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{
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writel(0, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
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writel(0, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
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writel(0, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
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}
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static int support_card_show_revision(void)
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{
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u32 revision;
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revision = readl(DCC_MICRO_SUPPORT_CARD_REVISION);
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if (revision >= 0x67) {
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printf("(DCC CPLD version 3.%d.%d)\n",
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revision >> 4, revision & 0xf);
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return 0;
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} else {
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printf("(DCC CPLD unknown version)\n");
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return -1;
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}
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}
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#endif
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void support_card_init(void)
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{
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/*
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* After power on, we need to keep the LAN controller in reset state
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* for a while. (200 usec)
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* Fortunatelly, enough wait time is already inserted in pll_init()
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* function. So we do not have to wait here.
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*/
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support_card_reset_deassert();
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}
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int check_support_card(void)
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{
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printf("SC: Micro Support Card ");
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return support_card_show_revision();
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}
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#if defined(CONFIG_SMC911X)
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#include <netdev.h>
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int board_eth_init(bd_t *bis)
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{
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return smc911x_initialize(0, CONFIG_SMC911X_BASE);
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}
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#endif
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#if !defined(CONFIG_SYS_NO_FLASH)
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#include <mtd/cfi_flash.h>
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#if CONFIG_SYS_MAX_FLASH_BANKS > 1
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static phys_addr_t flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS] =
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CONFIG_SYS_FLASH_BANKS_LIST;
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phys_addr_t cfi_flash_bank_addr(int i)
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{
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return flash_banks_list[i];
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}
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#endif
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int mem_is_flash(phys_addr_t base)
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{
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const int loop = 128;
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u32 *scratch_addr;
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u32 saved_value;
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int ret = 1;
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int i;
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scratch_addr = map_physmem(base + 0x01e00000,
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sizeof(u32) * loop, MAP_NOCACHE);
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for (i = 0; i < loop; i++, scratch_addr++) {
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saved_value = readl(scratch_addr);
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writel(~saved_value, scratch_addr);
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if (readl(scratch_addr) != saved_value) {
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/* We assume no memory or SRAM here. */
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writel(saved_value, scratch_addr);
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ret = 0;
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break;
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}
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}
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unmap_physmem(scratch_addr, MAP_NOCACHE);
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return ret;
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}
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int board_flash_wp_on(void)
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{
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int i;
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int ret = 1;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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if (mem_is_flash(cfi_flash_bank_addr(i))) {
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/*
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* We found at least one flash.
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* We need to return 0 and call flash_init().
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*/
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ret = 0;
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}
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#if CONFIG_SYS_MAX_FLASH_BANKS > 1
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else {
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/*
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* We might have a SRAM here.
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* To prevent SRAM data from being destroyed,
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* we set dummy address (SDRAM).
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*/
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flash_banks_list[i] = 0x80000000 + 0x10000 * i;
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}
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#endif
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}
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return ret;
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}
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#endif
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