mirror of
https://github.com/brain-hackers/u-boot-brain
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85 lines
2.8 KiB
C
85 lines
2.8 KiB
C
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/*
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* NVIDIA Tegra SPI-SLINK controller
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*
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* Copyright 2010-2013 NVIDIA Corporation
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*
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* This software may be used and distributed according to the
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* terms of the GNU Public License, Version 2, incorporated
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* herein by reference.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* Version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _TEGRA_SLINK_H_
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#define _TEGRA_SLINK_H_
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#include <asm/types.h>
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struct slink_tegra {
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u32 command; /* SLINK_COMMAND_0 register */
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u32 command2; /* SLINK_COMMAND2_0 reg */
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u32 status; /* SLINK_STATUS_0 register */
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u32 reserved; /* Reserved offset 0C */
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u32 mas_data; /* SLINK_MAS_DATA_0 reg */
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u32 slav_data; /* SLINK_SLAVE_DATA_0 reg */
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u32 dma_ctl; /* SLINK_DMA_CTL_0 register */
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u32 status2; /* SLINK_STATUS2_0 reg */
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u32 rsvd[56]; /* 0x20 to 0xFF reserved */
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u32 tx_fifo; /* SLINK_TX_FIFO_0 reg off 100h */
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u32 rsvd2[31]; /* 0x104 to 0x17F reserved */
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u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */
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};
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/* COMMAND */
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#define SLINK_CMD_ENB (1 << 31)
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#define SLINK_CMD_GO (1 << 30)
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#define SLINK_CMD_M_S (1 << 28)
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#define SLINK_CMD_CK_SDA (1 << 21)
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#define SLINK_CMD_CS_POL (1 << 13)
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#define SLINK_CMD_CS_VAL (1 << 12)
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#define SLINK_CMD_CS_SOFT (1 << 11)
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#define SLINK_CMD_BIT_LENGTH (1 << 4)
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#define SLINK_CMD_BIT_LENGTH_MASK 0x0000001F
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/* COMMAND2 */
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#define SLINK_CMD2_TXEN (1 << 30)
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#define SLINK_CMD2_RXEN (1 << 31)
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#define SLINK_CMD2_SS_EN (1 << 18)
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#define SLINK_CMD2_SS_EN_SHIFT 18
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#define SLINK_CMD2_SS_EN_MASK 0x000C0000
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#define SLINK_CMD2_CS_ACTIVE_BETWEEN (1 << 17)
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/* STATUS */
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#define SLINK_STAT_BSY (1 << 31)
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#define SLINK_STAT_RDY (1 << 30)
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#define SLINK_STAT_ERR (1 << 29)
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#define SLINK_STAT_RXF_FLUSH (1 << 27)
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#define SLINK_STAT_TXF_FLUSH (1 << 26)
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#define SLINK_STAT_RXF_OVF (1 << 25)
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#define SLINK_STAT_TXF_UNR (1 << 24)
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#define SLINK_STAT_RXF_EMPTY (1 << 23)
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#define SLINK_STAT_RXF_FULL (1 << 22)
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#define SLINK_STAT_TXF_EMPTY (1 << 21)
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#define SLINK_STAT_TXF_FULL (1 << 20)
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#define SLINK_STAT_TXF_OVF (1 << 19)
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#define SLINK_STAT_RXF_UNR (1 << 18)
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#define SLINK_STAT_CUR_BLKCNT (1 << 15)
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/* STATUS2 */
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#define SLINK_STAT2_RXF_FULL_CNT (1 << 16)
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#define SLINK_STAT2_TXF_FULL_CNT (1 << 0)
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#define SPI_TIMEOUT 1000
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#define TEGRA_SPI_MAX_FREQ 52000000
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#endif /* _TEGRA_SLINK_H_ */
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