u-boot-brain/arch/x86/cpu/slimbootloader/Kconfig

# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2019 Intel Corporation <www.intel.com>

config SYS_SLIMBOOTLOADER
	bool
	select USE_HOB
	imply SYS_NS16550
	imply AHCI_PCI
	imply SCSI
	imply SCSI_AHCI
	imply MMC
	imply MMC_PCI
	imply MMC_SDHCI
	imply MMC_SDHCI_SDMA
	imply USB
	imply USB_EHCI_HCD
	imply USB_XHCI_HCD
	imply E1000
	imply X86_TSC_READ_BASE
x86: Add new slimbootloader CPU type This slimbootloader CPU type is to enable U-Boot as a payload which runs on top of Slim Bootloader (https://github.com/slimbootloader). The Slim Bootloader is designed with multi-stage architecture for the execution from reset vector to OS booting, and supports QEMU, Apollolake, Whiskeylake and Coffeelake platforms consuming Intel FSP (https://github.com/IntelFsp) for silicon initialization including CAR and memory initialization. The Slim Bootloader generates new HOB (Hand Off Block) which are serial port info, memory map info, performance data info and so on, and passes it to a Payload. U-Boot as a payload will use these HOB information for basic initialization such as serial console. As an initial commit, - Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type - Add new arch/x86/cpu/slimbootloader directory with minimum codes - Get hob_list pointer from Slim Bootloader Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> 2019-08-03 17:30:12 +09:00			`# SPDX-License-Identifier: GPL-2.0+`
			`#`
			`# Copyright (C) 2019 Intel Corporation <www.intel.com>`

			`config SYS_SLIMBOOTLOADER`
			`bool`
			`select USE_HOB`
			`imply SYS_NS16550`
			`imply AHCI_PCI`
			`imply SCSI`
			`imply SCSI_AHCI`
			`imply MMC`
			`imply MMC_PCI`
			`imply MMC_SDHCI`
			`imply MMC_SDHCI_SDMA`
			`imply USB`
			`imply USB_EHCI_HCD`
			`imply USB_XHCI_HCD`
			`imply E1000`
x86: timer: use a timer base of 0 On x86 platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the time since reset. This particularly affects bootstage. Change the default to not read the timer base, leaving it at 0. Add an option for when U-Boot is the secondary bootloader. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-07 13:41:49 +09:00			`imply X86_TSC_READ_BASE`