2018-05-07 06:58:06 +09:00
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# SPDX-License-Identifier: GPL-2.0+
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2015-01-28 14:13:47 +09:00
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#
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# Copyright (C) 2015 Google, Inc
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config INTEL_BAYTRAIL
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bool
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2018-06-13 00:36:20 +09:00
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select HAVE_FSP
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select ARCH_MISC_INIT
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2017-08-17 17:10:43 +09:00
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select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
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2018-06-13 00:36:20 +09:00
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imply HAVE_INTEL_ME
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2017-07-30 22:23:14 +09:00
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imply ENABLE_MRC_CACHE
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2017-07-31 11:24:02 +09:00
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imply AHCI_PCI
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2017-07-30 22:23:17 +09:00
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imply ICH_SPI
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2017-07-30 22:23:28 +09:00
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imply INTEL_ICH6_GPIO
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2018-06-10 22:25:01 +09:00
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imply PINCTRL_ICH6
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2017-07-30 22:23:17 +09:00
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imply MMC
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imply MMC_PCI
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imply MMC_SDHCI
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imply MMC_SDHCI_SDMA
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imply SCSI
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2017-12-08 22:36:19 +09:00
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imply SCSI_AHCI
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2017-07-30 22:23:17 +09:00
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imply SPI_FLASH
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imply SYS_NS16550
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2017-07-30 22:23:27 +09:00
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imply USB
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imply USB_EHCI_HCD
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imply USB_XHCI_HCD
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2017-07-30 22:23:17 +09:00
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imply VIDEO_VESA
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2016-06-15 13:33:23 +09:00
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if INTEL_BAYTRAIL
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config INTERNAL_UART
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bool "Enable the SoC integrated legacy UART"
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help
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There is a legacy UART integrated into the Bay Trail SoC.
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A maximum baud rate of 115200 bps is supported. For this
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reason, it is recommended that the UART port be used for
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debug purposes only, eg: U-Boot console.
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2017-06-01 19:41:13 +09:00
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config DEBUG_UART
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bool
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select DEBUG_UART_BOARD_INIT
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2016-06-15 13:33:23 +09:00
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endif
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