brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-07-06 03:06:16 +09:00
Code Issues Projects Releases Wiki Activity
9570df03ee
u-boot-brain/board/freescale/ls2080aqds/MAINTAINERS

16 lines
513 B
Plaintext
Raw Normal View History

armv8: LS2080A: Rename LS2085A to reflect LS2080A LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-09 20:12:07 +09:00
LS2080A BOARD
armv8: fsl-layerscape: Add NXP LS2088A SoC support The QorIQ LS2088A SoC is built on layerscape architecture. It is similar to LS2080A SoC with some differences like 1)Timer controller offset is different 2)It has A72 cores 3)It supports TZASC module Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-17 15:59:55 +09:00
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>, Priyanka Jain <priyanka.jain@nxp.com>
armv8: LS2080A: Rename LS2085A to reflect LS2080A LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-09 20:12:07 +09:00
S: Maintained
F: board/freescale/ls2080aqds/
F: board/freescale/ls2080a/ls2080aqds.c
F: include/configs/ls2080aqds.h
F: configs/ls2080aqds_defconfig
F: configs/ls2080aqds_nand_defconfig
armv8: ls2080aqds: Update MAINTAINERS Add ls2080aqds_qspi_defconfig to file list. Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-01 23:40:39 +09:00
F: configs/ls2080aqds_qspi_defconfig
armv8: ls2080aqds: Add support for SD boot Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-05 19:12:29 +09:00
F: configs/ls2080aqds_sdcard_defconfig
armv8: ls2080rdb: ls2080qds: Add secure boot support Sec_init has been called at the beginning to initialize SEC Block (CAAM) which is used by secure boot validation later for both ls2080a qds and rdb. 64-bit address in ESBC Header has been enabled. Secure boot defconfigs are created for boards (NOR boot). Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-23 19:54:35 +09:00
LS2080A_SECURE_BOOT BOARD
board/freescale: Remove invalid fsl email addresses These fsl email addresses are no longer valid and they do not have a correspondent nxp.com entry. Remove all invalid fsl email addresses and mark the boards as orphan. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-03 08:12:07 +09:00
#M: Saksham Jain <saksham.jain@nxp.freescale.com>
S: Orphan (since 2018-05)
armv8: ls2080rdb: ls2080qds: Add secure boot support Sec_init has been called at the beginning to initialize SEC Block (CAAM) which is used by secure boot validation later for both ls2080a qds and rdb. 64-bit address in ESBC Header has been enabled. Secure boot defconfigs are created for boards (NOR boot). Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-23 19:54:35 +09:00
F: configs/ls2080aqds_SECURE_BOOT_defconfig
Reference in New Issue Copy Permalink