mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-23 18:38:51 +09:00
362 lines
9.7 KiB
Plaintext
362 lines
9.7 KiB
Plaintext
![]() |
/*
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* Copyright 2016 Logic PD
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* This file is adapted from imx6qdl-sabresd.dtsi.
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "imx6q.dtsi"
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/ {
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chosen {
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stdout-path = &uart1;
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};
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memory {
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reg = <0x10000000 0x80000000>;
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};
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};
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/* Reroute power feeding the CPU to come from the external PMIC */
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®_arm
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{
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vin-supply = <&sw1a_reg>;
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};
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®_soc
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{
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vin-supply = <&sw1c_reg>;
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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pmic: pfuze100@08 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-name = "vddcore";
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-name = "vddsoc";
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "gen_3v3";
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-name = "sw3a_vddr";
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-name = "sw3b_vddr";
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "gen_rgmii";
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-name = "gen_5v0";
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "gen_vsns";
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "gen_1v5";
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};
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vgen2_reg: vgen2 {
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regulator-name = "vgen2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-name = "gen_vadj_0";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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vgen4_reg: vgen4 {
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regulator-name = "gen_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-name = "gen_adj_1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-name = "gen_2v5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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};
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};
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mfg_eeprom: at24@51 {
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compatible = "atmel,24c64";
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pagesize = <32>;
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read-only;
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reg = <0x51>;
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};
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user_eeprom: at24@52 {
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compatible = "atmel,24c64";
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pagesize = <32>;
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reg = <0x52>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
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MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
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MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
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MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
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MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
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MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
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MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
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MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
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MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
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MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
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MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
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MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
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MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
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MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
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MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
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MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
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MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
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MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
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MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x1b0b0
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MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x80000000
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MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000
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MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x80000000
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MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000
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MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
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MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
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MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
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MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000
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MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000
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MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000
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MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x80000000
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MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
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MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
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MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x80000000
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
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MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x80000000
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MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x80000000
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MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x80000000
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MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x80000000
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MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x80000000
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MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000
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MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x80000000
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MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000
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MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000
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MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
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MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x80000000
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MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x80000000
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MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x80000000
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MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000
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MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000
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MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000
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MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
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MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
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MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x80000000
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000
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MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x80000000
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MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000
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MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000
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MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000
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MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x80000000
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
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MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x80000000
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MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000
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MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
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MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000
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MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000
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MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000
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MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000
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MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x80000000
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MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
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MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
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MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x80000000
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MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x80000000
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MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x80000000
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MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x80000000
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MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x80000000
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MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 0x80000000
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MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 0x80000000
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MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 0x80000000
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MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x80000000
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MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WL_IRQ */
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1f0b0 /* WLAN_EN */
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1f0b0 /* BT_EN */
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>;
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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non-removable;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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vmmc-supply = <&sw2_reg>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@0 {
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compatible = "ti,wl1837";
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reg = <2>;
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interrupt-parent = <&gpio7>;
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interrupts = <1 GPIO_ACTIVE_HIGH>;
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};
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};
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