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https://github.com/brain-hackers/u-boot-brain
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554 lines
13 KiB
C
554 lines
13 KiB
C
![]() |
// SPDX-License-Identifier: GPL-2.0
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/*
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* A driver for the I2C members of the Abracon AB x8xx RTC family,
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* and compatible: AB 1805 and AB 0805
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*
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* Copyright 2014-2015 Macq S.A.
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* Copyright 2020 Linaro
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*
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* Author: Philippe De Muyter <phdm@macqel.be>
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* Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
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* Author: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <i2c.h>
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#include <rtc.h>
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#include <log.h>
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#define ABX8XX_REG_HTH 0x00
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#define ABX8XX_REG_SC 0x01
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#define ABX8XX_REG_MN 0x02
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#define ABX8XX_REG_HR 0x03
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#define ABX8XX_REG_DA 0x04
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#define ABX8XX_REG_MO 0x05
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#define ABX8XX_REG_YR 0x06
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#define ABX8XX_REG_WD 0x07
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#define ABX8XX_REG_AHTH 0x08
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#define ABX8XX_REG_ASC 0x09
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#define ABX8XX_REG_AMN 0x0a
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#define ABX8XX_REG_AHR 0x0b
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#define ABX8XX_REG_ADA 0x0c
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#define ABX8XX_REG_AMO 0x0d
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#define ABX8XX_REG_AWD 0x0e
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#define ABX8XX_REG_STATUS 0x0f
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#define ABX8XX_STATUS_AF BIT(2)
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#define ABX8XX_STATUS_BLF BIT(4)
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#define ABX8XX_STATUS_WDT BIT(6)
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#define ABX8XX_REG_CTRL1 0x10
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#define ABX8XX_CTRL_WRITE BIT(0)
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#define ABX8XX_CTRL_ARST BIT(2)
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#define ABX8XX_CTRL_12_24 BIT(6)
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#define ABX8XX_REG_CTRL2 0x11
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#define ABX8XX_CTRL2_RSVD BIT(5)
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#define ABX8XX_REG_IRQ 0x12
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#define ABX8XX_IRQ_AIE BIT(2)
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#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
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#define ABX8XX_REG_CD_TIMER_CTL 0x18
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#define ABX8XX_REG_OSC 0x1c
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#define ABX8XX_OSC_FOS BIT(3)
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#define ABX8XX_OSC_BOS BIT(4)
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#define ABX8XX_OSC_ACAL_512 BIT(5)
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#define ABX8XX_OSC_ACAL_1024 BIT(6)
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#define ABX8XX_OSC_OSEL BIT(7)
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#define ABX8XX_REG_OSS 0x1d
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#define ABX8XX_OSS_OF BIT(1)
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#define ABX8XX_OSS_OMODE BIT(4)
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#define ABX8XX_REG_WDT 0x1b
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#define ABX8XX_WDT_WDS BIT(7)
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#define ABX8XX_WDT_BMB_MASK 0x7c
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#define ABX8XX_WDT_BMB_SHIFT 2
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#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
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#define ABX8XX_WDT_WRB_MASK 0x03
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#define ABX8XX_WDT_WRB_1HZ 0x02
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#define ABX8XX_REG_CFG_KEY 0x1f
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#define ABX8XX_CFG_KEY_OSC 0xa1
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#define ABX8XX_CFG_KEY_MISC 0x9d
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#define ABX8XX_REG_ID0 0x28
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#define ABX8XX_REG_OUT_CTRL 0x30
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#define ABX8XX_OUT_CTRL_EXDS BIT(4)
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#define ABX8XX_REG_TRICKLE 0x20
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#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
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#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
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#define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
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static u8 trickle_resistors[] = {0, 3, 6, 11};
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enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
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AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
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struct abx80x_cap {
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u16 pn;
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bool has_tc;
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bool has_wdog;
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};
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static struct abx80x_cap abx80x_caps[] = {
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[AB0801] = {.pn = 0x0801},
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[AB0803] = {.pn = 0x0803},
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[AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
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[AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
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[AB1801] = {.pn = 0x1801},
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[AB1803] = {.pn = 0x1803},
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[AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
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[AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
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[RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
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[ABX80X] = {.pn = 0}
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};
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static int abx80x_rtc_read8(struct udevice *dev, unsigned int reg)
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{
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int ret = 0;
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u8 buf;
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if (reg > 0xff)
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return -EINVAL;
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ret = dm_i2c_read(dev, reg, &buf, sizeof(buf));
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if (ret < 0)
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return ret;
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return buf;
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}
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static int abx80x_rtc_write8(struct udevice *dev, unsigned int reg, int val)
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{
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u8 buf = (u8)val;
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if (reg > 0xff)
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return -EINVAL;
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return dm_i2c_write(dev, reg, &buf, sizeof(buf));
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}
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static int abx80x_is_rc_mode(struct udevice *dev)
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{
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int flags = 0;
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flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
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if (flags < 0) {
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log_err("Failed to read autocalibration attribute\n");
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return flags;
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}
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return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
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}
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static int abx80x_enable_trickle_charger(struct udevice *dev, u8 trickle_cfg)
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{
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int err;
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/*
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* Write the configuration key register to enable access to the Trickle
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* register
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*/
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err = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY, ABX8XX_CFG_KEY_MISC);
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if (err < 0) {
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log_err("Unable to write configuration key\n");
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return -EIO;
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}
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err = dm_i2c_reg_write(dev, ABX8XX_REG_TRICKLE,
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ABX8XX_TRICKLE_CHARGE_ENABLE | trickle_cfg);
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if (err < 0) {
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log_err("Unable to write trickle register\n");
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return -EIO;
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}
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return 0;
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}
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static int abx80x_rtc_read_time(struct udevice *dev, struct rtc_time *tm)
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{
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unsigned char buf[8];
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int err, flags, rc_mode = 0;
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/* Read the Oscillator Failure only in XT mode */
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rc_mode = abx80x_is_rc_mode(dev);
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if (rc_mode < 0)
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return rc_mode;
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if (!rc_mode) {
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flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
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if (flags < 0) {
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log_err("Unable to read oscillator status.\n");
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return flags;
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}
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if (flags & ABX8XX_OSS_OF)
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log_debug("Oscillator fail, data is not accurate.\n");
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}
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err = dm_i2c_read(dev, ABX8XX_REG_HTH,
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buf, sizeof(buf));
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if (err < 0) {
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log_err("Unable to read date\n");
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return -EIO;
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}
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tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
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tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
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tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
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tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
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tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
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tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F);
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tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 2000;
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return 0;
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}
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static int abx80x_rtc_set_time(struct udevice *dev, const struct rtc_time *tm)
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{
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unsigned char buf[8];
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int err, flags;
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if (tm->tm_year < 2000)
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return -EINVAL;
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buf[ABX8XX_REG_HTH] = 0;
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buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
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buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
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buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
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buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
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buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon);
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buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 2000);
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buf[ABX8XX_REG_WD] = tm->tm_wday;
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err = dm_i2c_write(dev, ABX8XX_REG_HTH,
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buf, sizeof(buf));
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if (err < 0) {
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log_err("Unable to write to date registers\n");
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return -EIO;
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}
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/* Clear the OF bit of Oscillator Status Register */
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flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
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if (flags < 0) {
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log_err("Unable to read oscillator status.\n");
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return flags;
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}
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err = dm_i2c_reg_write(dev, ABX8XX_REG_OSS,
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flags & ~ABX8XX_OSS_OF);
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if (err < 0) {
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log_err("Unable to write oscillator status register\n");
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return err;
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}
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return 0;
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}
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static int abx80x_rtc_set_autocalibration(struct udevice *dev,
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int autocalibration)
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{
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int retval, flags = 0;
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if (autocalibration != 0 && autocalibration != 1024 &&
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autocalibration != 512) {
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log_err("autocalibration value outside permitted range\n");
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return -EINVAL;
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}
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flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSC);
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if (flags < 0)
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return flags;
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if (autocalibration == 0) {
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flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
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} else if (autocalibration == 1024) {
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/* 1024 autocalibration is 0x10 */
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flags |= ABX8XX_OSC_ACAL_1024;
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flags &= ~(ABX8XX_OSC_ACAL_512);
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} else {
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/* 512 autocalibration is 0x11 */
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flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
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}
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/* Unlock write access to Oscillator Control Register */
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retval = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY,
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ABX8XX_CFG_KEY_OSC);
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if (retval < 0) {
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log_err("Failed to write CONFIG_KEY register\n");
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return retval;
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}
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retval = dm_i2c_reg_write(dev, ABX8XX_REG_OSC, flags);
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return retval;
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}
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static int abx80x_rtc_get_autocalibration(struct udevice *dev)
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{
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int flags = 0, autocalibration;
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flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSC);
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if (flags < 0)
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return flags;
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if (flags & ABX8XX_OSC_ACAL_512)
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autocalibration = 512;
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else if (flags & ABX8XX_OSC_ACAL_1024)
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autocalibration = 1024;
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else
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autocalibration = 0;
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return autocalibration;
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}
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static struct rtc_time default_tm = { 0, 0, 0, 1, 1, 2000, 6, 0, 0 };
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static int abx80x_rtc_reset(struct udevice *dev)
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{
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int ret = 0;
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int autocalib = abx80x_rtc_get_autocalibration(dev);
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if (autocalib != 0)
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abx80x_rtc_set_autocalibration(dev, 0);
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ret = abx80x_rtc_set_time(dev, &default_tm);
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if (ret != 0) {
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log_err("cannot set time to default_tm. error %d\n", ret);
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return ret;
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}
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return ret;
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}
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static const struct rtc_ops abx80x_rtc_ops = {
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.get = abx80x_rtc_read_time,
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.set = abx80x_rtc_set_time,
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.reset = abx80x_rtc_reset,
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.read8 = abx80x_rtc_read8,
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.write8 = abx80x_rtc_write8
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};
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static int abx80x_dt_trickle_cfg(struct udevice *dev)
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{
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const char *diode;
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int trickle_cfg = 0;
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int i, ret = 0;
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u32 tmp;
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diode = ofnode_read_string(dev_ofnode(dev), "abracon,tc-diode");
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if (!diode)
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return ret;
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if (!strcmp(diode, "standard")) {
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trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
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} else if (!strcmp(diode, "schottky")) {
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trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
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} else {
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log_err("Invalid tc-diode value: %s\n", diode);
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return -EINVAL;
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}
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ret = ofnode_read_u32(dev_ofnode(dev), "abracon,tc-resistor", &tmp);
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if (ret)
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return ret;
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for (i = 0; i < sizeof(trickle_resistors); i++)
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if (trickle_resistors[i] == tmp)
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break;
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if (i == sizeof(trickle_resistors)) {
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log_err("Invalid tc-resistor value: %u\n", tmp);
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return -EINVAL;
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}
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return (trickle_cfg | i);
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}
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static int abx80x_probe(struct udevice *dev)
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{
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int i, data, err, trickle_cfg = -EINVAL;
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unsigned char buf[7];
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unsigned int part = dev->driver_data;
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unsigned int partnumber;
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unsigned int majrev, minrev;
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unsigned int lot;
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unsigned int wafer;
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unsigned int uid;
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err = dm_i2c_read(dev, ABX8XX_REG_ID0, buf, sizeof(buf));
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if (err < 0) {
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log_err("Unable to read partnumber\n");
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return -EIO;
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}
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partnumber = (buf[0] << 8) | buf[1];
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majrev = buf[2] >> 3;
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minrev = buf[2] & 0x7;
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lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
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uid = ((buf[4] & 0x7f) << 8) | buf[5];
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wafer = (buf[6] & 0x7c) >> 2;
|
||
|
log_debug("model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
|
||
|
partnumber, majrev, minrev, lot, wafer, uid);
|
||
|
|
||
|
data = dm_i2c_reg_read(dev, ABX8XX_REG_CTRL1);
|
||
|
if (data < 0) {
|
||
|
log_err("Unable to read control register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
err = dm_i2c_reg_write(dev, ABX8XX_REG_CTRL1,
|
||
|
((data & ~(ABX8XX_CTRL_12_24 |
|
||
|
ABX8XX_CTRL_ARST)) |
|
||
|
ABX8XX_CTRL_WRITE));
|
||
|
if (err < 0) {
|
||
|
log_err("Unable to write control register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
/* Configure RV1805 specifics */
|
||
|
if (part == RV1805) {
|
||
|
/*
|
||
|
* Avoid accidentally entering test mode. This can happen
|
||
|
* on the RV1805 in case the reserved bit 5 in control2
|
||
|
* register is set. RV-1805-C3 datasheet indicates that
|
||
|
* the bit should be cleared in section 11h - Control2.
|
||
|
*/
|
||
|
data = dm_i2c_reg_read(dev, ABX8XX_REG_CTRL2);
|
||
|
if (data < 0) {
|
||
|
log_err("Unable to read control2 register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
err = dm_i2c_reg_write(dev, ABX8XX_REG_CTRL2,
|
||
|
data & ~ABX8XX_CTRL2_RSVD);
|
||
|
if (err < 0) {
|
||
|
log_err("Unable to write control2 register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Avoid extra power leakage. The RV1805 uses smaller
|
||
|
* 10pin package and the EXTI input is not present.
|
||
|
* Disable it to avoid leakage.
|
||
|
*/
|
||
|
data = dm_i2c_reg_read(dev, ABX8XX_REG_OUT_CTRL);
|
||
|
if (data < 0) {
|
||
|
log_err("Unable to read output control register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Write the configuration key register to enable access to
|
||
|
* the config2 register
|
||
|
*/
|
||
|
err = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY,
|
||
|
ABX8XX_CFG_KEY_MISC);
|
||
|
if (err < 0) {
|
||
|
log_err("Unable to write configuration key\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
err = dm_i2c_reg_write(dev, ABX8XX_REG_OUT_CTRL,
|
||
|
data | ABX8XX_OUT_CTRL_EXDS);
|
||
|
if (err < 0) {
|
||
|
log_err("Unable to write output control register\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/* part autodetection */
|
||
|
if (part == ABX80X) {
|
||
|
for (i = 0; abx80x_caps[i].pn; i++)
|
||
|
if (partnumber == abx80x_caps[i].pn)
|
||
|
break;
|
||
|
if (abx80x_caps[i].pn == 0) {
|
||
|
log_err("Unknown part: %04x\n", partnumber);
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
part = i;
|
||
|
}
|
||
|
|
||
|
if (partnumber != abx80x_caps[part].pn) {
|
||
|
log_err("partnumber mismatch %04x != %04x\n",
|
||
|
partnumber, abx80x_caps[part].pn);
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
if (abx80x_caps[part].has_tc)
|
||
|
trickle_cfg = abx80x_dt_trickle_cfg(dev);
|
||
|
|
||
|
if (trickle_cfg > 0) {
|
||
|
log_debug("Enabling trickle charger: %02x\n", trickle_cfg);
|
||
|
abx80x_enable_trickle_charger(dev, trickle_cfg);
|
||
|
}
|
||
|
|
||
|
err = dm_i2c_reg_write(dev, ABX8XX_REG_CD_TIMER_CTL, BIT(2));
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static const struct udevice_id abx80x_of_match[] = {
|
||
|
{
|
||
|
.compatible = "abracon,abx80x",
|
||
|
.data = ABX80X
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab0801",
|
||
|
.data = AB0801
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab0803",
|
||
|
.data = AB0803
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab0804",
|
||
|
.data = AB0804
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab0805",
|
||
|
.data = AB0805
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab1801",
|
||
|
.data = AB1801
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab1803",
|
||
|
.data = AB1803
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab1804",
|
||
|
.data = AB1804
|
||
|
},
|
||
|
{
|
||
|
.compatible = "abracon,ab1805",
|
||
|
.data = AB1805
|
||
|
},
|
||
|
{
|
||
|
.compatible = "microcrystal,rv1805",
|
||
|
.data = RV1805
|
||
|
},
|
||
|
{ }
|
||
|
};
|
||
|
|
||
|
U_BOOT_DRIVER(abx80x_rtc) = {
|
||
|
.name = "rtc-abx80x",
|
||
|
.id = UCLASS_RTC,
|
||
|
.probe = abx80x_probe,
|
||
|
.of_match = abx80x_of_match,
|
||
|
.ops = &abx80x_rtc_ops,
|
||
|
};
|