mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 05:43:21 +09:00
699 lines
15 KiB
C
699 lines
15 KiB
C
![]() |
/*
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* GE B105v2, B125v2, B155v2
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*
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* Copyright 2018-2020 GE Inc.
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* Copyright 2018-2020 Collabora Ltd.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/mach-imx/video.h>
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#include <command.h>
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#include <common.h>
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#include <i2c.h>
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#include <input.h>
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#include <ipu_pixfmt.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <malloc.h>
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#include <miiphy.h>
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#include <micrel.h>
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#include <netdev.h>
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#include <panel.h>
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#include <rtc.h>
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#include <spi_flash.h>
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#include <version.h>
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#include "../common/vpd_reader.h"
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SPL_BUILD
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#define B1X5V2_GE_VPD_OFFSET 0x0100000
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#define B1X5V2_GE_VPD_SIZE 1022
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#define VPD_TYPE_INVALID 0x00
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#define VPD_BLOCK_NETWORK 0x20
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#define VPD_BLOCK_HWID 0x44
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#define VPD_MAC_ADDRESS_LENGTH 6
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#define VPD_FLAG_VALID_MAC BIT(1)
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#define AR8035_PHY_ID 0x004dd072
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#define AR8035_PHY_DEBUG_ADDR_REG 0x1d
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#define AR8035_PHY_DEBUG_DATA_REG 0x1e
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#define AR8035_HIB_CTRL_REG 0xb
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#define AR8035_HIBERNATE_EN (1 << 15)
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static struct vpd_cache {
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bool is_read;
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u8 product_id;
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unsigned char mac[VPD_MAC_ADDRESS_LENGTH];
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u32 flags;
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} vpd;
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enum product_type {
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PRODUCT_TYPE_B105V2 = 6,
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PRODUCT_TYPE_B105PV2 = 7,
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PRODUCT_TYPE_B125V2 = 8,
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PRODUCT_TYPE_B125PV2 = 9,
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PRODUCT_TYPE_B155V2 = 10,
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PRODUCT_TYPE_INVALID = 0,
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};
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int dram_init(void) {
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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int power_init_board(void)
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{
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/* all required PMIC configuration happens via DT */
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return 0;
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}
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static int disable_phy_hibernation(struct phy_device *phydev)
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{
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unsigned short val;
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if (phydev->drv->uid == AR8035_PHY_ID) {
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/* Disable hibernation, other configuration has been done by PHY driver */
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phy_write(phydev, MDIO_DEVAD_NONE, AR8035_PHY_DEBUG_ADDR_REG, AR8035_HIB_CTRL_REG);
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val = phy_read(phydev, MDIO_DEVAD_NONE, AR8035_PHY_DEBUG_DATA_REG);
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val &= ~AR8035_HIBERNATE_EN;
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phy_write(phydev, MDIO_DEVAD_NONE, AR8035_PHY_DEBUG_DATA_REG, val);
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} else {
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printf("Unknown PHY: %08x\n", phydev->drv->uid);
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}
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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disable_phy_hibernation(phydev);
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return 0;
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}
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static int auo_g101evn01_detect(const struct display_info_t *info)
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{
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char *dev = env_get("devicetype");
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return !strcmp(dev, "B105v2") || !strcmp(dev, "B105Pv2");
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}
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static int auo_g121ean01_detect(const struct display_info_t *info)
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{
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char *dev = env_get("devicetype");
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return !strcmp(dev, "B125v2") || !strcmp(dev, "B125Pv2");;
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}
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static int auo_g156xtn01_detect(const struct display_info_t *info)
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{
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char *dev = env_get("devicetype");
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return !strcmp(dev, "B155v2");
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}
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static void b1x5v2_backlight_enable(int percent)
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{
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struct udevice *panel;
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int ret;
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ret = uclass_get_device(UCLASS_PANEL, 0, &panel);
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if (ret) {
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printf("Could not find panel: %d\n", ret);
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return;
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}
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panel_set_backlight(panel, percent);
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panel_enable_backlight(panel);
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}
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static void lcd_enable(const struct display_info_t *info)
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{
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printf("Enable backlight...\n");
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b1x5v2_backlight_enable(100);
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}
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struct display_info_t const displays[] = {
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{
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.di = 0,
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.bus = -1,
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.addr = -1,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = auo_g156xtn01_detect,
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.enable = lcd_enable,
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.mode = {
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.name = "AUO G156XTN01",
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.refresh = 60,
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.xres = 1368, /* because of i.MX6 limitation, actually 1366 */
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.yres = 768,
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.pixclock = 13158, /* 76 MHz in ps */
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.left_margin = 33,
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.right_margin = 67,
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.upper_margin = 4,
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.lower_margin = 4,
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.hsync_len = 94,
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.vsync_len = 30,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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}
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},
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{
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.di = 0,
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.bus = -1,
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.addr = -1,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = auo_g121ean01_detect,
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.enable = lcd_enable,
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.mode = {
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.name = "AUO G121EAN01.4",
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.refresh = 60,
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.xres = 1280,
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.yres = 800,
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.pixclock = 14992, /* 66.7 MHz in ps */
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.left_margin = 8,
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.right_margin = 58,
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.upper_margin = 6,
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.lower_margin = 4,
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.hsync_len = 70,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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}
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},
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{
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.di = 0,
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.bus = -1,
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.addr = -1,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = auo_g101evn01_detect,
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.enable = lcd_enable,
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.mode = {
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.name = "AUO G101EVN01.3",
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.refresh = 60,
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.xres = 1280,
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.yres = 800,
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.pixclock = 14992, /* 66.7 MHz in ps */
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.left_margin = 8,
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.right_margin = 58,
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.upper_margin = 6,
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.lower_margin = 4,
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.hsync_len = 70,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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}
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}
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};
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size_t display_count = ARRAY_SIZE(displays);
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static void enable_videopll(void)
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{
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struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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s32 timeout = 100000;
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setbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN);
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/* PLL_VIDEO 455MHz (24MHz * (37+11/12) / 2)
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* |
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* PLL5
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* |
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* CS2CDR[LDB_DI0_CLK_SEL]
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* |
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* +----> LDB_DI0_SERIAL_CLK_ROOT
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* |
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* +--> CSCMR2[LDB_DI0_IPU_DIV] --> LDB_DI0_IPU 455 / 7 = 65 MHz
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*/
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clrsetbits_le32(&ccm->analog_pll_video,
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BM_ANADIG_PLL_VIDEO_DIV_SELECT |
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BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT,
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BF_ANADIG_PLL_VIDEO_DIV_SELECT(37) |
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BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(1));
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writel(BF_ANADIG_PLL_VIDEO_NUM_A(11), &ccm->analog_pll_video_num);
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writel(BF_ANADIG_PLL_VIDEO_DENOM_B(12), &ccm->analog_pll_video_denom);
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clrbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN);
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while (timeout--)
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if (readl(&ccm->analog_pll_video) & BM_ANADIG_PLL_VIDEO_LOCK)
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break;
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if (timeout < 0)
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printf("Warning: video pll lock timeout!\n");
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clrsetbits_le32(&ccm->analog_pll_video,
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BM_ANADIG_PLL_VIDEO_BYPASS,
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BM_ANADIG_PLL_VIDEO_ENABLE);
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}
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static void setup_display(void)
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{
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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enable_videopll();
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/* When a reset/reboot is performed the display power needs to be turned
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* off for atleast 500ms. The boot time is ~300ms, we need to wait for
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* an additional 200ms here. Unfortunately we use external PMIC for
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* doing the reset, so can not differentiate between POR vs soft reset
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*/
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mdelay(200);
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/* CCM_CSCMR2 -> ldb_di0_ipu_div [IMX6SDLRM page 839] */
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/* divide IPU clock by 7 */
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setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
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/* CCM_CHSCCDR -> ipu1_di0_clk_sel [IMX6SDLRM page 849] */
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/* Set LDB_DI0 as clock source for IPU_DI0 */
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clrsetbits_le32(&mxc_ccm->chsccdr,
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MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK,
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(CHSCCDR_CLK_SEL_LDB_DI0 <<
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MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET));
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/* Turn on IPU LDB DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
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enable_ipu_clock();
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/* IOMUXC_GPR2 [IMX6SDLRM page 2049] */
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/* Set LDB Channel 0 in SPWG 24 Bit mode */
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writel(IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_HIGH |
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IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
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IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT |
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IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
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&iomux->gpr[2]);
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/* IOMUXC_GPR3 [IMX6SDLRM page 2051] */
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/* LVDS0 is connected to IPU DI0 */
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clrsetbits_le32(&iomux->gpr[3],
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IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
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(IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
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IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET));
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}
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_early_init_f(void)
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{
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select_ldb_di_clock_source(MXC_PLL5_CLK);
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return 0;
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}
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static int eeti_touch_get_model(struct udevice *dev, char *result) {
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u8 query[68] = {0x67, 0x00, 0x42, 0x00, 0x03, 0x01, 'E', 0x00, 0x00, 0x00};
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struct i2c_msg qmsg = {
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.addr = 0x2a,
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.flags = 0,
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.len = sizeof(query),
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.buf = query,
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};
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u8 reply[66] = {0};
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struct i2c_msg rmsg = {
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.addr = 0x2a,
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.flags = I2C_M_RD,
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.len = sizeof(reply),
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.buf = reply,
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};
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int err;
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err = dm_i2c_xfer(dev, &qmsg, 1);
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if (err)
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return err;
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/*
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* device sends IRQ when its ok to read. To keep the code
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* simple we just wait an arbitrary, long enough time period.
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*/
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mdelay(10);
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err = dm_i2c_xfer(dev, &rmsg, 1);
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if (err)
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return err;
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if (reply[0] != 0x42 || reply[1] != 0x00 ||
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reply[2] != 0x03 || reply[4] != 'E')
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return -EPROTO;
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memcpy(result, reply+5, 10);
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return 0;
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}
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static bool b1x5v2_board_is_p_model(void)
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{
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struct udevice *bus = NULL;
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struct udevice *dev = NULL;
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int err;
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err = uclass_get_device_by_name(UCLASS_I2C, "i2c@21a0000", &bus);
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if (err || !bus) {
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printf("Could not get I2C bus: %d\n", err);
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return true;
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}
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/* The P models do not have this port expander */
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err = dm_i2c_probe(bus, 0x21, 0, &dev);
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if (err || !dev) {
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return true;
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}
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return false;
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}
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static enum product_type b1x5v2_board_type(void)
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{
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struct udevice *bus = NULL;
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struct udevice *dev = NULL;
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char model[11] = {0};
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int err;
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int retry;
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err = uclass_get_device_by_name(UCLASS_I2C, "i2c@21a8000", &bus);
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if (err) {
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printf("Could not get I2C bus: %d\n", err);
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return PRODUCT_TYPE_INVALID;
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}
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err = dm_i2c_probe(bus, 0x41, 0, &dev);
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if (!err && dev) { /* Ilitek Touchscreen */
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if (b1x5v2_board_is_p_model()) {
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return PRODUCT_TYPE_B105PV2;
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} else {
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return PRODUCT_TYPE_B105V2;
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}
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}
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err = dm_i2c_probe(bus, 0x2a, 0, &dev);
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if (err || !dev) {
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printf("Could not find touchscreen: %d\n", err);
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return PRODUCT_TYPE_INVALID;
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}
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for (retry = 0; retry < 3; ++retry) {
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|
err = eeti_touch_get_model(dev, model);
|
||
|
if (!err)
|
||
|
break;
|
||
|
printf("Retry %d read EETI touchscreen model: %d\n", retry + 1, err);
|
||
|
}
|
||
|
if (err) {
|
||
|
printf("Could not read EETI touchscreen model: %d\n", err);
|
||
|
return PRODUCT_TYPE_INVALID;
|
||
|
}
|
||
|
|
||
|
if (!strcmp(model, "Orion_1320")) { /* EETI EXC80H60 */
|
||
|
if (b1x5v2_board_is_p_model()) {
|
||
|
return PRODUCT_TYPE_B125PV2;
|
||
|
} else {
|
||
|
return PRODUCT_TYPE_B125V2;
|
||
|
}
|
||
|
} else if (!strcmp(model, "Orion_1343")) { /* EETI EXC80H84 */
|
||
|
return PRODUCT_TYPE_B155V2;
|
||
|
}
|
||
|
|
||
|
printf("Unknown EETI touchscreen model: %s\n", model);
|
||
|
return PRODUCT_TYPE_INVALID;
|
||
|
}
|
||
|
|
||
|
static void set_env_per_board_type(enum product_type type)
|
||
|
{
|
||
|
switch (type) {
|
||
|
case PRODUCT_TYPE_B105V2:
|
||
|
env_set("resolution", "1280x800");
|
||
|
env_set("devicetype", "B105v2");
|
||
|
env_set("fdtfile", "imx6dl-b105v2.dtb");
|
||
|
break;
|
||
|
case PRODUCT_TYPE_B105PV2:
|
||
|
env_set("resolution", "1280x800");
|
||
|
env_set("devicetype", "B105Pv2");
|
||
|
env_set("fdtfile", "imx6dl-b105pv2.dtb");
|
||
|
break;
|
||
|
case PRODUCT_TYPE_B125V2:
|
||
|
env_set("resolution", "1280x800");
|
||
|
env_set("devicetype", "B125v2");
|
||
|
env_set("fdtfile", "imx6dl-b125v2.dtb");
|
||
|
break;
|
||
|
case PRODUCT_TYPE_B125PV2:
|
||
|
env_set("resolution", "1280x800");
|
||
|
env_set("devicetype", "B125Pv2");
|
||
|
env_set("fdtfile", "imx6dl-b125pv2.dtb");
|
||
|
break;
|
||
|
case PRODUCT_TYPE_B155V2:
|
||
|
env_set("resolution", "1366x768");
|
||
|
env_set("devicetype", "B155v2");
|
||
|
env_set("fdtfile", "imx6dl-b155v2.dtb");
|
||
|
break;
|
||
|
default:
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static int b1x5v2_board_type_autodetect(void)
|
||
|
{
|
||
|
enum product_type product = b1x5v2_board_type();
|
||
|
if (product != PRODUCT_TYPE_INVALID) {
|
||
|
set_env_per_board_type(product);
|
||
|
return 0;
|
||
|
}
|
||
|
return -1;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Extracts MAC and product information from the VPD.
|
||
|
*/
|
||
|
static int vpd_callback(struct vpd_cache *vpd, u8 id, u8 version, u8 type,
|
||
|
size_t size, u8 const *data)
|
||
|
{
|
||
|
if (type == VPD_TYPE_INVALID)
|
||
|
return 0;
|
||
|
|
||
|
if (id == VPD_BLOCK_HWID && version == 1 && size >= 1) {
|
||
|
vpd->product_id = data[0];
|
||
|
} else if (id == VPD_BLOCK_NETWORK && version == 1) {
|
||
|
if (size >= VPD_MAC_ADDRESS_LENGTH) {
|
||
|
memcpy(vpd->mac, data, VPD_MAC_ADDRESS_LENGTH);
|
||
|
vpd->flags |= VPD_FLAG_VALID_MAC;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int read_spi_vpd(struct vpd_cache *cache,
|
||
|
int (*process_block)(struct vpd_cache *, u8 id, u8 version,
|
||
|
u8 type, size_t size, u8 const *data))
|
||
|
{
|
||
|
static const int size = B1X5V2_GE_VPD_SIZE;
|
||
|
struct udevice *dev;
|
||
|
int ret;
|
||
|
u8 *data;
|
||
|
|
||
|
ret = uclass_get_device_by_name(UCLASS_SPI_FLASH, "m25p80@0", &dev);
|
||
|
if (ret)
|
||
|
return ret;
|
||
|
|
||
|
data = malloc(size);
|
||
|
if (!data)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
ret = spi_flash_read_dm(dev, B1X5V2_GE_VPD_OFFSET, size, data);
|
||
|
if (ret) {
|
||
|
free(data);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
ret = vpd_reader(size, data, cache, process_block);
|
||
|
|
||
|
free(data);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
int board_init(void)
|
||
|
{
|
||
|
if (!read_spi_vpd(&vpd, vpd_callback)) {
|
||
|
vpd.is_read = true;
|
||
|
}
|
||
|
|
||
|
/* address of boot parameters */
|
||
|
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||
|
setup_display();
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static void init_bootcause(void)
|
||
|
{
|
||
|
const char *cause;
|
||
|
|
||
|
/* We care about WDOG only, treating everything else as
|
||
|
* a power-on-reset.
|
||
|
*/
|
||
|
if (get_imx_reset_cause() & 0x0010)
|
||
|
cause = "WDOG";
|
||
|
else
|
||
|
cause = "POR";
|
||
|
|
||
|
env_set("bootcause", cause);
|
||
|
}
|
||
|
|
||
|
int misc_init_r(void)
|
||
|
{
|
||
|
init_bootcause();
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
#define M41T62_REG_FLAGS 0xf
|
||
|
#define M41T62_FLAGS_OF (1 << 2)
|
||
|
static void check_time(void)
|
||
|
{
|
||
|
struct udevice *rtc = NULL;
|
||
|
struct rtc_time tm;
|
||
|
u8 val;
|
||
|
int ret;
|
||
|
|
||
|
ret = uclass_get_device_by_name(UCLASS_RTC, "m41t62@68", &rtc);
|
||
|
if (ret) {
|
||
|
printf("Could not get RTC: %d\n", ret);
|
||
|
env_set("rtc_status", "FAIL");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
ret = dm_i2c_read(rtc, M41T62_REG_FLAGS, &val, sizeof(val));
|
||
|
if (ret) {
|
||
|
printf("Could not read RTC register: %d\n", ret);
|
||
|
env_set("rtc_status", "FAIL");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
ret = dm_rtc_reset(rtc);
|
||
|
if (ret) {
|
||
|
printf("Could not reset RTC: %d\n", ret);
|
||
|
env_set("rtc_status", "FAIL");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
if (val & M41T62_FLAGS_OF) {
|
||
|
env_set("rtc_status", "STOP");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
ret = dm_rtc_get(rtc, &tm);
|
||
|
if (ret) {
|
||
|
printf("Could not read RTC: %d\n", ret);
|
||
|
env_set("rtc_status", "FAIL");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
if (tm.tm_year > 2037) {
|
||
|
tm.tm_sec = 0;
|
||
|
tm.tm_min = 0;
|
||
|
tm.tm_hour = 0;
|
||
|
tm.tm_mday = 1;
|
||
|
tm.tm_wday = 2;
|
||
|
tm.tm_mon = 1;
|
||
|
tm.tm_year = 2036;
|
||
|
|
||
|
ret = dm_rtc_set(rtc, &tm);
|
||
|
if (ret) {
|
||
|
printf("Could not update RTC: %d\n", ret);
|
||
|
env_set("rtc_status", "FAIL");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
printf("RTC behind 2037, capped to 2036 for userspace handling\n");
|
||
|
env_set("rtc_status", "2038");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
env_set("rtc_status", "OK");
|
||
|
}
|
||
|
|
||
|
static void process_vpd(struct vpd_cache *vpd)
|
||
|
{
|
||
|
if (!vpd->is_read) {
|
||
|
printf("VPD wasn't read\n");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
if (vpd->flags & VPD_FLAG_VALID_MAC) {
|
||
|
eth_env_set_enetaddr_by_index("eth", 0, vpd->mac);
|
||
|
env_set("ethact", "eth0");
|
||
|
}
|
||
|
}
|
||
|
|
||
|
int board_late_init(void)
|
||
|
{
|
||
|
process_vpd(&vpd);
|
||
|
|
||
|
if (vpd.product_id >= PRODUCT_TYPE_B105V2 &&
|
||
|
vpd.product_id <= PRODUCT_TYPE_B155V2) {
|
||
|
set_env_per_board_type((enum product_type)vpd.product_id);
|
||
|
} else {
|
||
|
b1x5v2_board_type_autodetect();
|
||
|
}
|
||
|
|
||
|
printf("Board: GE %s\n", env_get("devicetype"));
|
||
|
|
||
|
check_time();
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_OF_BOARD_SETUP
|
||
|
int ft_board_setup(void *blob, struct bd_info *bd)
|
||
|
{
|
||
|
char *rtc_status = env_get("rtc_status");
|
||
|
|
||
|
fdt_setprop(blob, 0, "ge,boot-ver", version_string,
|
||
|
strlen(version_string) + 1);
|
||
|
fdt_setprop(blob, 0, "ge,rtc-status", rtc_status,
|
||
|
strlen(rtc_status) + 1);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
static int do_b1x5v2_autodetect(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
|
||
|
{
|
||
|
int err;
|
||
|
|
||
|
err = b1x5v2_board_type_autodetect();
|
||
|
if (!err)
|
||
|
printf("Identified %s\n", env_get("devicetype"));
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
U_BOOT_CMD(
|
||
|
autodetect_devtype, 1, 1, do_b1x5v2_autodetect,
|
||
|
"autodetect b1x5v2 device type",
|
||
|
""
|
||
|
);
|
||
|
|
||
|
#endif // CONFIG_SPL_BUILD
|