2018-05-07 06:58:06 +09:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2014-03-26 02:39:33 +09:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2014
|
|
|
|
* NVIDIA Corporation <www.nvidia.com>
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
2017-07-25 23:30:12 +09:00
|
|
|
#include <dm.h>
|
2020-05-11 02:40:05 +09:00
|
|
|
#include <log.h>
|
2014-12-10 14:25:21 +09:00
|
|
|
#include <power/as3722.h>
|
2017-07-25 23:30:12 +09:00
|
|
|
#include <power/pmic.h>
|
2014-12-10 14:25:21 +09:00
|
|
|
|
2014-04-23 05:37:55 +09:00
|
|
|
#include <asm/arch/gpio.h>
|
2014-03-26 02:39:33 +09:00
|
|
|
#include <asm/arch/pinmux.h>
|
2014-12-10 14:25:21 +09:00
|
|
|
|
2014-03-26 02:39:33 +09:00
|
|
|
#include "pinmux-config-jetson-tk1.h"
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Routine: pinmux_init
|
|
|
|
* Description: Do individual peripheral pinmux configs
|
|
|
|
*/
|
|
|
|
void pinmux_init(void)
|
|
|
|
{
|
2015-02-19 05:27:04 +09:00
|
|
|
pinmux_clear_tristate_input_clamping();
|
2014-04-23 05:37:56 +09:00
|
|
|
|
2014-04-23 05:37:55 +09:00
|
|
|
gpio_config_table(jetson_tk1_gpio_inits,
|
|
|
|
ARRAY_SIZE(jetson_tk1_gpio_inits));
|
|
|
|
|
2014-03-26 02:39:33 +09:00
|
|
|
pinmux_config_pingrp_table(jetson_tk1_pingrps,
|
|
|
|
ARRAY_SIZE(jetson_tk1_pingrps));
|
|
|
|
|
|
|
|
pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
|
|
|
|
ARRAY_SIZE(jetson_tk1_drvgrps));
|
2016-04-22 07:03:37 +09:00
|
|
|
|
|
|
|
pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps,
|
|
|
|
ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
|
2014-03-26 02:39:33 +09:00
|
|
|
}
|
2014-12-10 14:25:21 +09:00
|
|
|
|
|
|
|
#ifdef CONFIG_PCI_TEGRA
|
2017-07-25 23:30:12 +09:00
|
|
|
/* TODO: Convert to driver model */
|
|
|
|
static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
|
2014-12-10 14:25:21 +09:00
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
2017-07-25 23:30:12 +09:00
|
|
|
if (sd > 6)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
|
2014-12-10 14:25:21 +09:00
|
|
|
if (err) {
|
2017-09-16 14:10:41 +09:00
|
|
|
pr_err("failed to update SD control register: %d", err);
|
2014-12-10 14:25:21 +09:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2017-07-25 23:30:12 +09:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int tegra_pcie_board_init(void)
|
|
|
|
{
|
|
|
|
struct udevice *dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = uclass_get_device_by_driver(UCLASS_PMIC,
|
|
|
|
DM_GET_DRIVER(pmic_as3722), &dev);
|
|
|
|
if (ret) {
|
|
|
|
debug("%s: Failed to find PMIC\n", __func__);
|
|
|
|
return ret;
|
2014-12-10 14:25:21 +09:00
|
|
|
}
|
|
|
|
|
2017-07-25 23:30:12 +09:00
|
|
|
ret = as3722_sd_enable(dev, 4);
|
|
|
|
if (ret < 0) {
|
2017-09-16 14:10:41 +09:00
|
|
|
pr_err("failed to enable SD4: %d\n", ret);
|
2017-07-25 23:30:12 +09:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = as3722_sd_set_voltage(dev, 4, 0x24);
|
|
|
|
if (ret < 0) {
|
2017-09-16 14:10:41 +09:00
|
|
|
pr_err("failed to set SD4 voltage: %d\n", ret);
|
2017-07-25 23:30:12 +09:00
|
|
|
return ret;
|
2014-12-10 14:25:21 +09:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif /* PCI */
|