mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-30 13:58:51 +09:00
127 lines
2.9 KiB
C
127 lines
2.9 KiB
C
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/*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* CPU and Board Configuration Options
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*/
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_SERVERIP
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#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#ifdef CONFIG_OF_CONTROL
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#undef CONFIG_OF_SEPARATE
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#define CONFIG_OF_EMBED
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#endif
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#else
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#define CONFIG_SYS_TEXT_BASE 0x80000000
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/*
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* Print Buffer Size
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*/
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/*
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* max number of command args
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*/
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#define CONFIG_SYS_MAXARGS 16
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/*
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* Boot Argument Buffer Size
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*/
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* Size of malloc() pool
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* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
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*/
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#define CONFIG_SYS_MALLOC_LEN (512 << 10)
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1 \
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(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
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#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
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/*
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* Serial console configuration
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*/
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_SERIAL
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#ifndef CONFIG_DM_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#endif
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#define CONFIG_SYS_NS16550_CLK 19660800
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/*
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* SD (MMC) controller
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*/
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#define CONFIG_FTSDC010_NUMBER 1
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#define CONFIG_FTSDC010_SDIO
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/* Init Stack Pointer */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
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GENERATED_GBL_DATA_SIZE)
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/*
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* Load address and memory test area should agree with
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* arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */
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/*
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* memtest works on 512 MB in DRAM
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*/
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
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/* environments */
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 50000000
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#define CONFIG_ENV_SPI_MODE 0
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_ENV_OVERWRITE
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/* SPI FLASH */
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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#define CONFIG_SF_DEFAULT_MODE 0
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 16 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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/* Initial Memory map for Linux*/
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#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
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/* Increase max gunzip size */
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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#endif /* __CONFIG_H */
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