imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.
Build target: mx6qpsabreauto_config
Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-11 12:38:47 +09:00
|
|
|
CONFIG_ARM=y
|
2015-08-07 21:35:24 +09:00
|
|
|
CONFIG_ARCH_MX6=y
|
imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.
Build target: mx6qpsabreauto_config
Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-11 12:38:47 +09:00
|
|
|
CONFIG_TARGET_MX6QSABREAUTO=y
|
2016-10-18 11:12:40 +09:00
|
|
|
CONFIG_VIDEO=y
|
imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.
Build target: mx6qpsabreauto_config
Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-11 12:38:47 +09:00
|
|
|
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6qp.cfg,MX6Q"
|
2016-06-13 22:45:14 +09:00
|
|
|
CONFIG_BOOTDELAY=3
|
2016-10-18 11:12:37 +09:00
|
|
|
# CONFIG_CONSOLE_MUX is not set
|
|
|
|
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
2016-10-18 11:12:59 +09:00
|
|
|
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
|
2017-01-21 19:48:33 +09:00
|
|
|
CONFIG_BOARD_LATE_INIT=y
|
2016-04-22 10:37:19 +09:00
|
|
|
CONFIG_HUSH_PARSER=y
|
2016-04-25 06:29:26 +09:00
|
|
|
CONFIG_CMD_BOOTZ=y
|
2016-04-23 05:41:25 +09:00
|
|
|
# CONFIG_CMD_IMLS is not set
|
2016-04-25 06:29:26 +09:00
|
|
|
CONFIG_CMD_MMC=y
|
2016-04-23 05:41:25 +09:00
|
|
|
CONFIG_CMD_SF=y
|
|
|
|
CONFIG_CMD_I2C=y
|
|
|
|
CONFIG_CMD_USB=y
|
2016-04-25 06:29:26 +09:00
|
|
|
CONFIG_CMD_DFU=y
|
|
|
|
CONFIG_CMD_USB_MASS_STORAGE=y
|
2015-11-11 22:39:33 +09:00
|
|
|
CONFIG_CMD_GPIO=y
|
2016-04-23 05:41:25 +09:00
|
|
|
CONFIG_CMD_DHCP=y
|
2016-04-25 06:29:26 +09:00
|
|
|
CONFIG_CMD_MII=y
|
2016-04-23 05:41:25 +09:00
|
|
|
CONFIG_CMD_PING=y
|
2016-04-25 06:29:26 +09:00
|
|
|
CONFIG_CMD_CACHE=y
|
|
|
|
CONFIG_CMD_EXT2=y
|
|
|
|
CONFIG_CMD_EXT4=y
|
|
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
|
|
CONFIG_CMD_FAT=y
|
|
|
|
CONFIG_CMD_FS_GENERIC=y
|
2016-09-20 02:31:30 +09:00
|
|
|
CONFIG_DFU_MMC=y
|
|
|
|
CONFIG_DFU_SF=y
|
imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.
Build target: mx6qpsabreauto_config
Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-11 12:38:47 +09:00
|
|
|
CONFIG_SPI_FLASH=y
|
2015-11-25 22:34:54 +09:00
|
|
|
CONFIG_SPI_FLASH_STMICRO=y
|
2016-03-25 23:39:47 +09:00
|
|
|
CONFIG_USB=y
|
2016-09-09 05:31:26 +09:00
|
|
|
CONFIG_USB_STORAGE=y
|
2016-03-25 23:39:47 +09:00
|
|
|
CONFIG_USB_GADGET=y
|
2016-04-13 20:20:25 +09:00
|
|
|
CONFIG_CI_UDC=y
|
2016-04-13 20:20:26 +09:00
|
|
|
CONFIG_USB_GADGET_DOWNLOAD=y
|
2016-04-13 20:20:30 +09:00
|
|
|
CONFIG_G_DNL_MANUFACTURER="FSL"
|
|
|
|
CONFIG_G_DNL_VENDOR_NUM=0x0525
|
|
|
|
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
|
2016-10-18 11:12:51 +09:00
|
|
|
# CONFIG_VIDEO_SW_CURSOR is not set
|
2016-02-23 14:55:42 +09:00
|
|
|
CONFIG_OF_LIBFDT=y
|