2018-05-07 06:58:06 +09:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2016-07-20 18:55:12 +09:00
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/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#ifndef __AT91_PMC_H__
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#define __AT91_PMC_H__
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2017-09-05 19:30:07 +09:00
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#include <regmap.h>
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2020-09-07 23:46:38 +09:00
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#include <linux/bitops.h>
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#include <linux/io.h>
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/* Keep a range of 256 available clocks for every clock type. */
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#define AT91_TO_CLK_ID(_t, _i) (((_t) << 8) | ((_i) & 0xff))
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#define AT91_CLK_ID_TO_DID(_i) ((_i) & 0xff)
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2017-09-05 19:30:07 +09:00
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2016-07-20 18:55:12 +09:00
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struct pmc_platdata {
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struct at91_pmc *reg_base;
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2017-09-05 19:30:07 +09:00
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struct regmap *regmap_sfr;
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2016-07-20 18:55:12 +09:00
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};
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int at91_pmc_core_probe(struct udevice *dev);
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2016-09-27 12:00:29 +09:00
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int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name);
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2017-05-19 11:09:40 +09:00
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int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args);
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2016-09-27 12:00:29 +09:00
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int at91_clk_probe(struct udevice *dev);
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2016-07-20 18:55:12 +09:00
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2020-09-07 23:46:38 +09:00
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int at91_clk_mux_val_to_index(const u32 *table, u32 num_parents, u32 val);
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int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index);
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void pmc_read(void __iomem *base, unsigned int off, unsigned int *val);
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void pmc_write(void __iomem *base, unsigned int off, unsigned int val);
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void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
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unsigned int bits);
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2016-07-20 18:55:12 +09:00
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#endif
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