2018-05-07 06:58:06 +09:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2013-05-22 12:57:37 +09:00
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/*
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* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
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*/
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2013-11-09 19:22:08 +09:00
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#ifndef _MALTA_CONFIG_H
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#define _MALTA_CONFIG_H
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2013-05-22 12:57:37 +09:00
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/*
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* System configuration
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*/
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2013-11-09 19:22:08 +09:00
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#define CONFIG_MALTA
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2013-05-22 12:57:37 +09:00
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2013-10-24 21:32:00 +09:00
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#define CONFIG_MEMSIZE_IN_BYTES
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2013-05-22 12:57:42 +09:00
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#define CONFIG_PCI_GT64120
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2013-11-08 20:18:50 +09:00
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#define CONFIG_PCI_MSC01
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2013-05-22 12:57:44 +09:00
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#define CONFIG_PCNET
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2013-11-08 20:18:52 +09:00
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#define CONFIG_PCNET_79C973
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#define PCNET_HAS_PROM
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2013-05-22 12:57:42 +09:00
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2013-11-08 20:18:55 +09:00
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#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
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2013-05-22 12:57:37 +09:00
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/*
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* CPU Configuration
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*/
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#define CONFIG_SYS_MHZ 250 /* arbitrary value */
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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/*
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* Memory map
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*/
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2013-11-13 00:47:32 +09:00
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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2013-05-22 12:57:37 +09:00
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2016-05-26 22:49:36 +09:00
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#ifdef CONFIG_64BIT
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# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
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#else
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# define CONFIG_SYS_SDRAM_BASE 0x80000000
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#endif
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2013-05-22 12:57:37 +09:00
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#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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2016-05-26 22:49:36 +09:00
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
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2013-05-22 12:57:37 +09:00
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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2013-11-27 02:45:28 +09:00
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#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
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2013-05-22 12:57:37 +09:00
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/*
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* Serial driver
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*/
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2016-05-17 15:43:27 +09:00
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#define CONFIG_SYS_NS16550_PORT_MAPPED
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2013-05-22 12:57:37 +09:00
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/*
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* Flash configuration
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*/
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2016-05-26 22:49:36 +09:00
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#ifdef CONFIG_64BIT
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# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
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#else
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# define CONFIG_SYS_FLASH_BASE 0xbe000000
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#endif
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2013-05-22 12:57:39 +09:00
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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2013-05-22 12:57:37 +09:00
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2013-11-08 20:18:56 +09:00
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/*
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* Environment
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*/
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#define CONFIG_ENV_SECT_SIZE 0x20000
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
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2015-01-29 19:38:20 +09:00
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/*
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* IDE/ATA
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*/
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#define CONFIG_SYS_IDE_MAXBUS 1
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#define CONFIG_SYS_IDE_MAXDEVICE 2
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#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
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#define CONFIG_SYS_ATA_DATA_OFFSET 0
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#define CONFIG_SYS_ATA_REG_OFFSET 0
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2013-05-22 12:57:37 +09:00
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/*
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* Commands
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*/
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2013-05-22 12:57:42 +09:00
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2013-11-09 19:22:08 +09:00
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#endif /* _MALTA_CONFIG_H */
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