mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-17 23:48:52 +09:00
289 lines
9.2 KiB
Plaintext
289 lines
9.2 KiB
Plaintext
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================================================================================
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Board Information
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================================================================================
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Developed by HiSilicon, the board features the Hi3798C V200 with an
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integrated quad-core 64-bit ARM Cortex A53 processor and high
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performance Mali T720 GPU, making it capable of running any commercial
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set-top solution based on Linux or Android. Its high performance
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specification also supports a premium user experience with up to H.265
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HEVC decoding of 4K video at 60 frames per second.
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SOC Hisilicon Hi3798CV200
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CPU Quad-core ARM Cortex-A53 64 bit
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DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
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USB Two USB 2.0 ports One USB 3.0 ports
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CONSOLE USB-micro port for console support
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ETHERNET 1 GBe Ethernet
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PCIE One PCIe 2.0 interfaces
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JTAG 8-Pin JTAG
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EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot
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DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor
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WIFI 802.11AC 2*2 with Bluetooth
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CONNECTORS One connector for Smart Card One connector for TSI
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================================================================================
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BUILD INSTRUCTIONS
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================================================================================
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Note of warning:
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================
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U-boot has a *strong* dependency with the l-loader and the arm trusted firmware
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repositories.
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The boot sequence is:
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l-loader --> arm_trusted_firmware --> u-boot
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U-Boot needs to be aware of the BL31 runtime location and size to avoid writing
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over it. Currently, BL31 is being placed below the kernel text offset (check
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poplar.c) but this could change in the future.
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The current version of u-boot has been tested with:
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- https://github.com/Linaro/poplar-l-loader.git
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commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c
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Author: Alex Elder <elder@linaro.org>
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Date: Fri Jun 16 08:57:59 2017 -0500
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l-loader: use external memory region definitions
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The ARM Trusted Firmware code now has a header file that collects
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all the definitions for the memory regions used for its boot stages.
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Include that file where needed, and use the definitions found therein
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Signed-off-by: Alex Elder <elder@linaro.org>
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- https://github.com/Linaro/poplar-arm-trusted-firmware.git
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commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68
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Author: Alex Elder <elder@linaro.org>
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Date: Fri Jun 16 09:24:50 2017 -0500
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poplar: define memory regions in a separate file
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Separate the definitions for memory regions used for the BL stage
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images and FIP into a new file. The "l-loader" image uses knowledge
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of the sizes and locations of these memory regions, and it can now
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include this (external) header to get these definitions, rather than
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having to make coordinated changes to both code bases.
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The new file has a complete set of definitions (more than may be
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required by one or the other user). It also includes a summary of
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how the boot process works, and how it uses these regions.
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It should now be relatively easy to adjust the sizes and locations
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of these memory regions, or to add to them (e.g. for TEE).
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Signed-off-by: Alex Elder <elder@linaro.org>
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Compile from source:
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====================
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Get all the sources
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> mkdir -p ~/poplar/src ~/poplar/bin
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> cd ~/poplar/src
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> git clone https://github.com/Linaro/poplar-l-loader.git l-loader
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> git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf
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> git clone https://github.com/Linaro/poplar-u-boot.git u-boot
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Make sure you are using the correct branch on each one of these repositories.
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The definition of "correct" might change over time (at this moment in time this
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would be the "latest" branch).
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Compile U-Boot:
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===============
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Prerequisite:
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# sudo apt-get install device-tree-compiler
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> cd ~/poplar/src/u-boot
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> make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig
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> make CROSS_COMPILE=aarch64-linux-gnu-
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> cp u-boot.bin ~/poplar/bin
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Compile ARM Trusted Firmware (ATF):
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===================================
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> cd ~/poplar/src/atf
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> make CROSS_COMPILE=aarch64-linux-gnu- all fip \
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SPD=none BL33=~/poplar/bin/u-boot.bin DEBUG=1 PLAT=poplar
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Copy resulting binaries
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> cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/
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> cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/
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Compile l-loader:
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=================
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> cd ~/poplar/src/l-loader
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> make clean
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> make CROSS_COMPILE=arm-linux-gnueabi-
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Due to BootROM requiremets, rename l-loader.bin to fastboot.bin:
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> cp l-loader.bin ~/poplar/bin/fastboot.bin
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================================================================================
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FLASH INSTRUCTIONS
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================================================================================
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Two methods:
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Using USB debrick support:
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Copy fastboot.bin to a FAT partition on the USB drive and reboot the
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poplar board while pressing S3(usb_boot).
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The system will execute the new u-boot and boot into a shell which you
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can then use to write to eMMC.
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Using U-BOOT from shell:
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1) using AXIS usb ethernet dongle and tftp
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2) using FAT formated USB drive
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1. TFTP (USB ethernet dongle)
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=============================
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Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board.
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Copy fastboot.bin to your tftp server.
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In u-boot make sure your network is properly setup.
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Then
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=> tftp 0x30000000 fastboot.bin
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starting USB...
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USB0: USB EHCI 1.00
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scanning bus 0 for devices... 1 USB Device(s) found
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USB1: USB EHCI 1.00
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scanning bus 1 for devices... 3 USB Device(s) found
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scanning usb for storage devices... 0 Storage Device(s) found
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scanning usb for ethernet devices... 1 Ethernet Device(s) found
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Waiting for Ethernet connection... done.
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Using asx0 device
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TFTP from server 192.168.1.4; our IP address is 192.168.1.10
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Filename 'poplar/fastboot.bin'.
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Load address: 0x30000000
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Loading: #################################################################
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#################################################################
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###############################################################
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2 MiB/s
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done
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Bytes transferred = 983040 (f0000 hex)
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=> mmc write 0x30000000 0 0x780
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MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
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=> reset
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2. USING USB FAT DRIVE
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=======================
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Copy fastboot.bin to any partition on a FAT32 formated usb flash drive.
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Enter the uboot prompt
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=> fatls usb 0:2
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983040 fastboot.bin
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1 file(s), 0 dir(s)
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=> fatload usb 0:2 0x30000000 fastboot.bin
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reading fastboot.bin
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983040 bytes read in 44 ms (21.3 MiB/s)
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=> mmc write 0x30000000 0 0x780
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MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
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================================================================================
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BOOT TRACE
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================================================================================
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Bootrom start
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Boot Media: eMMC
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Decrypt auxiliary code ...OK
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lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000
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Entry boot auxiliary code
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Auxiliary code - v1.00
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DDR code - V1.1.2 20160205
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Build: Mar 24 2016 - 17:09:44
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Reg Version: v134
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Reg Time: 2016/03/18 09:44:55
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Reg Name: hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg
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Boot auxiliary code success
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Bootrom success
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LOADER: Switched to aarch64 mode
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LOADER: Entering ARM TRUSTED FIRMWARE
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LOADER: CPU0 executes at 0x000ce000
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INFO: BL1: 0xe1000 - 0xe7000 [size = 24576]
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NOTICE: Booting Trusted Firmware
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NOTICE: BL1: v1.3(debug):v1.3-372-g1ba9c60
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NOTICE: BL1: Built : 17:51:33, Apr 30 2017
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INFO: BL1: RAM 0xe1000 - 0xe7000
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INFO: BL1: Loading BL2
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INFO: Loading image id=1 at address 0xe9000
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INFO: Image id=1 loaded at address 0xe9000, size = 0x5008
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NOTICE: BL1: Booting BL2
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INFO: Entry point address = 0xe9000
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INFO: SPSR = 0x3c5
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NOTICE: BL2: v1.3(debug):v1.3-372-g1ba9c60
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NOTICE: BL2: Built : 17:51:33, Apr 30 2017
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INFO: BL2: Loading BL31
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INFO: Loading image id=3 at address 0x129000
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INFO: Image id=3 loaded at address 0x129000, size = 0x8038
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INFO: BL2: Loading BL33
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INFO: Loading image id=5 at address 0x37000000
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INFO: Image id=5 loaded at address 0x37000000, size = 0x58f17
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NOTICE: BL1: Booting BL31
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INFO: Entry point address = 0x129000
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INFO: SPSR = 0x3cd
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INFO: Boot bl33 from 0x37000000 for 364311 Bytes
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NOTICE: BL31: v1.3(debug):v1.3-372-g1ba9c60
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NOTICE: BL31: Built : 17:51:33, Apr 30 2017
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INFO: BL31: Initializing runtime services
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INFO: BL31: Preparing for EL3 exit to normal world
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INFO: Entry point address = 0x37000000
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INFO: SPSR = 0x3c9
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U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar
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Model: HiSilicon Poplar Development Board
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BOARD: Hisilicon HI3798cv200 Poplar
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DRAM: 1 GiB
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MMC: Hisilicon DWMMC: 0
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In: serial@f8b00000
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Out: serial@f8b00000
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Err: serial@f8b00000
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Net: Net Initialization Skipped
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No ethernet found.
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Hit any key to stop autoboot: 0
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starting USB...
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USB0: USB EHCI 1.00
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scanning bus 0 for devices... 1 USB Device(s) found
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USB1: USB EHCI 1.00
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scanning bus 1 for devices... 4 USB Device(s) found
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scanning usb for storage devices... 1 Storage Device(s) found
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scanning usb for ethernet devices... 1 Ethernet Device(s) found
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USB device 0:
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Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade
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Type: Removable Hard Disk
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Capacity: 7632.0 MB = 7.4 GB (15630336 x 512)
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... is now current device
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Scanning usb 0:1...
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=>
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