u-boot-brain/drivers/pinctrl/mscc/Makefile

# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

obj-y += mscc-common.o
obj-$(CONFIG_PINCTRL_MSCC_OCELOT) += pinctrl-ocelot.o
obj-$(CONFIG_PINCTRL_MSCC_LUTON) += pinctrl-luton.o
obj-$(CONFIG_PINCTRL_MSCC_JR2) += pinctrl-jr2.o
pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based) This driver supports the pin and gpio controller found in the Ocelot and Luton SoCs. The driver was inspired from the pinctrl driver in Linux, but was simplified and was modified to allow supporting an other SoCs (Luton). For Ocelot and Luton the controller is the same, only the pins to program differ. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2018-12-08 17:59:01 +09:00			`# SPDX-License-Identifier: (GPL-2.0+ OR MIT)`

			`obj-y += mscc-common.o`
			`obj-$(CONFIG_PINCTRL_MSCC_OCELOT) += pinctrl-ocelot.o`
			`obj-$(CONFIG_PINCTRL_MSCC_LUTON) += pinctrl-luton.o`
pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC family The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common to support new numbe of pins and remove any platform dependency from mscc-common. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> 2019-01-13 02:56:55 +09:00			`obj-$(CONFIG_PINCTRL_MSCC_JR2) += pinctrl-jr2.o`