2008-04-14 17:53:12 +09:00
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/*
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* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
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*
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* Configuration settings for the MX31ADS Freescale board.
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*
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2013-10-07 20:07:26 +09:00
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* SPDX-License-Identifier: GPL-2.0+
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2008-04-14 17:53:12 +09:00
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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2011-03-14 23:43:56 +09:00
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#include <asm/arch/imx-regs.h>
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2008-04-14 17:53:12 +09:00
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/* High Level Configuration Options */
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2014-11-06 14:59:37 +09:00
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#define CONFIG_MX31 1 /* This is a mx31 */
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2008-04-14 17:53:12 +09:00
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2011-06-05 15:26:49 +09:00
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#define CONFIG_SYS_TEXT_BASE 0xA0000000
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2011-09-22 17:07:16 +09:00
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#define CONFIG_MACH_TYPE MACH_TYPE_MX31ADS
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2008-04-14 17:53:12 +09:00
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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2008-04-14 17:53:12 +09:00
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/*
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* Hardware drivers
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*/
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2011-11-22 23:22:39 +09:00
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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2008-04-14 17:53:12 +09:00
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2008-04-15 20:33:11 +09:00
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#define CONFIG_HARD_SPI 1
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#define CONFIG_MXC_SPI 1
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SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 18:10:31 +09:00
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#define CONFIG_DEFAULT_SPI_BUS 1
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2010-08-24 03:41:19 +09:00
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#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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2011-08-26 18:44:52 +09:00
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#define CONFIG_MXC_GPIO
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2008-04-15 20:33:11 +09:00
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2011-10-08 18:02:53 +09:00
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/* PMIC Controller */
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2012-11-13 12:22:14 +09:00
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#define CONFIG_POWER
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#define CONFIG_POWER_SPI
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#define CONFIG_POWER_FSL
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2010-04-17 00:11:19 +09:00
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#define CONFIG_FSL_PMIC_BUS 1
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#define CONFIG_FSL_PMIC_CS 0
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#define CONFIG_FSL_PMIC_CLK 1000000
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2010-08-24 03:41:19 +09:00
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#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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2011-10-08 18:02:53 +09:00
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#define CONFIG_FSL_PMIC_BITLEN 32
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2011-10-24 15:44:15 +09:00
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#define CONFIG_RTC_MC13XXX
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2008-04-15 20:33:11 +09:00
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2008-04-14 17:53:12 +09:00
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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2008-04-28 07:25:32 +09:00
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#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
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2008-04-15 20:33:11 +09:00
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"uboot_addr=0xa0000000\0" \
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"uboot=mx31ads/u-boot.bin\0" \
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"kernel=mx31ads/uImage\0" \
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"nfsroot=/opt/eldk/arm\0" \
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"bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
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"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"bootcmd=run bootcmd_net\0" \
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"bootcmd_net=run bootargs_base bootargs_nfs; " \
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"tftpboot ${loadaddr} ${kernel}; bootm\0" \
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"prg_uboot=tftpboot ${loadaddr} ${uboot}; " \
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"protect off ${uboot_addr} 0xa003ffff; " \
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"erase ${uboot_addr} 0xa003ffff; " \
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"cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \
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"setenv filesize; saveenv\0"
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2008-04-14 17:53:12 +09:00
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2009-08-26 05:09:37 +09:00
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#define CONFIG_CS8900
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#define CONFIG_CS8900_BASE 0xb4020300
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#define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */
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2008-04-04 00:04:22 +09:00
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/*
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* The MX31ADS board seems to have a hardware "peculiarity" confirmed under
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* U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
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* controller inverted. The controller is capable of detecting and correcting
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* this, but it needs 4 network packets for that. Which means, at startup, you
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* will not receive answers to the first 4 packest, unless there have been some
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* broadcasts on the network, or your board is on a hub. Reducing the ARP
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* timeout from default 5 seconds to 200ms we speed up the initial TFTP
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* transfer, should the user wish one, significantly.
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*/
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#define CONFIG_ARP_TIMEOUT 200UL
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2008-04-14 17:53:12 +09:00
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/*
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* Miscellaneous configurable options
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*/
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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2008-04-14 17:53:12 +09:00
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/* Print Buffer Size */
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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2008-04-14 17:53:12 +09:00
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x10000
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2008-04-14 17:53:12 +09:00
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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2008-04-14 17:53:12 +09:00
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#define CONFIG_CMDLINE_EDITING 1
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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2011-06-05 15:26:49 +09:00
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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2008-04-14 17:53:12 +09:00
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_FLASH_BASE CS0_BASE
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
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2008-04-14 17:53:12 +09:00
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2011-06-06 14:06:07 +09:00
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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2008-09-11 05:48:06 +09:00
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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2011-06-06 14:06:07 +09:00
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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2008-04-04 00:04:22 +09:00
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/* Address and size of Redundant Environment Sector */
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2011-06-06 14:06:07 +09:00
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
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2008-09-11 05:48:06 +09:00
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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2008-04-04 00:04:22 +09:00
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2008-04-14 17:53:12 +09:00
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/*-----------------------------------------------------------------------
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* CFI FLASH driver setup
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*/
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
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2008-08-13 08:40:42 +09:00
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#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
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2008-04-04 00:04:22 +09:00
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#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
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2008-10-16 22:01:15 +09:00
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
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2008-04-14 17:53:12 +09:00
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/*
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* JFFS2 partitions
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*/
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#define CONFIG_JFFS2_DEV "nor0"
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#endif /* __CONFIG_H */
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