u-boot-brain/arch/arm/cpu/armv8/zynqmp/Makefile

#
# (C) Copyright 2014 - 2015 Xilinx, Inc.
# Michal Simek <michal.simek@xilinx.com>
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y	+= clk.o
obj-y	+= cpu.o
obj-$(CONFIG_MP)	+= mp.o
obj-y	+= slcr.o
obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o
arm64: Add Xilinx ZynqMP support Add basic Xilinx ZynqMP arm64 support. Serial and SD is supported. It supports emulation platfrom ep108 and QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> 2015-01-15 18:01:51 +09:00			`#`
			`# (C) Copyright 2014 - 2015 Xilinx, Inc.`
			`# Michal Simek <michal.simek@xilinx.com>`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`obj-y += clk.o`
			`obj-y += cpu.o`
zynqmp: Add support for R5 sw loading Add support for loading sw for R5 with enabling for zynqmp. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> 2015-04-15 20:36:40 +09:00			`obj-$(CONFIG_MP) += mp.o`
zynqmp: Add support for IP detection via SLCR SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2015-07-22 16:27:11 +09:00			`obj-y += slcr.o`
ARM64: zynqmp: Generate handoff structure for ATF Xilinx ATF extending options for passing images from BL2(FSBL) to BL31. U-Boot SPL is FSBL replacement that's why it should generate handoff structure the same. Support only one entry which is U-Boot in EL2 itself. When FIT image is adopted structure generate should be data driven. Currently ATF is placing this structure at the beggining of OCM which is rewriting early parts of ATF which should be unused at that time. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2017-01-09 18:05:16 +09:00			`obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o`