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https://github.com/brain-hackers/u-boot-brain
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104 lines
4.7 KiB
Plaintext
104 lines
4.7 KiB
Plaintext
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SRIO Boot on Corenet Platforms
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For some PowerPC processors with SRIO interface, boot location can be configured
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to SRIO by RCW. The processor booting from SRIO can do without flash for u-boot
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image, ucode and ENV. All the images can be fetched from another processor's
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memory space by SRIO link connected between them.
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This document describes the processes based on an example implemented on P4080DS
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platforms and a RCW example with boot from SRIO configuration.
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Environment of the SRIO boot:
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a) Master and slave can be SOCs in one board or SOCs in separate boards.
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b) They are connected with SRIO links, whether 1x or 4x, and directly or
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through switch system.
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c) Only Master has NorFlash for booting, and all the Master's and Slave's
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U-Boot images, UCodes will be stored in this flash.
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d) Slave has its own EEPROM for RCW and PBI.
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e) Slave's RCW should configure the SerDes for SRIO boot port, set the boot
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location to SRIO, and holdoff all the cores if needed.
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---------- ----------- -----------
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| | | | | |
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| NorFlash|<----->| Master | SRIO | Slave |<---->[EEPROM]
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| | | |<===========>| |
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---------- ----------- -----------
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The example based on P4080DS platform:
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Two P4080DS platforms can be used to implement the boot from SRIO. Their SRIO
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ports 0 will be connected directly and will be used for the boot from SRIO.
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1. Slave's RCW example for boot from SRIO port 0 and core 0 not in holdoff.
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00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
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00000010: 1818 1818 0000 8888 7440 4000 0000 2000
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00000020: f400 0000 0100 0000 0000 0000 0000 0000
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00000030: 0000 0000 0083 0000 0000 0000 0000 0000
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00000040: 0000 0000 0000 0000 0813 8040 698b 93fe
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2. Slave's RCW example for boot from SRIO port 0 and all cores in holdoff.
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00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
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00000010: 1818 1818 0000 8888 7440 4000 0000 2000
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00000020: f440 0000 0100 0000 0000 0000 0000 0000
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00000030: 0000 0000 0083 0000 0000 0000 0000 0000
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00000040: 0000 0000 0000 0000 0813 8040 063c 778f
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3. Sequence in Step by Step.
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a) Update RCW for slave with boot from SRIO port 0 configuration.
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b) Program slave's U-Boot image, UCode, and ENV parameters into master's
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NorFlash.
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c) Start up master and it will boot up normally from its NorFlash.
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Then, it will finish necessary configurations for slave's boot from
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SRIO port 0.
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d) Master will set inbound SRIO windows covered slave's U-Boot image stored
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in master's NorFlash.
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e) Master will set an inbound SRIO window covered slave's UCode stored in
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master's NorFlash.
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f) Master will set an inbound SRIO window covered slave's ENV stored in
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master's NorFlash.
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g) If need to release slave's core, master will set outbound SRIO windows
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in order to configure slave's registers for the core's releasing.
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h) If all cores of slave in holdoff, slave should be powered on before all
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the above master's steps, and wait to be released by master. If not all
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cores in holdoff, that means core 0 will start up normally, slave should
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be powered on after all the above master's steps. In the startup phase
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of the slave from SRIO, it will finish some necessary configurations.
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i) Slave will set a specific TLB entry for the boot process.
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j) Slave will set a LAW entry with the TargetID SRIO port 0 for the boot.
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k) Slave will set a specific TLB entry in order to fetch UCode and ENV
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from master.
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l) Slave will set a LAW entry with the TargetID SRIO port 0 for UCode and ENV.
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How to use this feature:
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To use this feature, you need to focus three points.
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1. Slave's RCW with SRIO boot configurations, and all cores in holdoff
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configurations if needed.
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Please refer to the examples given above.
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2. U-Boot image's compilation.
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For master, U-Boot image should be generated specifically by
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make xxxx_SRIOBOOT_MASTER_config.
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For example, master U-Boot image used on P4080DS should be compiled with
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make P4080DS_SRIOBOOT_MASTER_config.
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For slave, U-Boot image should be generated specifically by
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make xxxx_SRIOBOOT_SLAVE_config.
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For example, slave U-Boot image used on P4080DS should be compiled with
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make P4080DS_SRIOBOOT_SLAVE_config.
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3. Necessary modifications based on a specific environment.
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For a specific environment, the SRIO port for boot, the addresses of the
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slave's U-Boot image, UCode, ENV stored in master's NorFlash, and any other
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configurations can be modified in the file:
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include/configs/corenet_ds.h.
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