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u-boot-brain/arch/arm/mach-uniphier/sc64-regs.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 06:58:06 +09:00
/* SPDX-License-Identifier: GPL-2.0+ */
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
/*
* UniPhier SC (System Control) block registers for ARMv8 SoCs
*
ARM: uniphier: add PLL init code for LD20 SoC Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-17 03:33:11 +09:00
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
*/
#ifndef SC64_REGS_H
#define SC64_REGS_H
ARM: uniphier: de-couple SC macros into base address and offset The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:41 +09:00
#ifndef __ASSEMBLY__
#include <linux/compiler.h>
ARM: uniphier: detect register base addresses run-time Until the last SoC, the register addresses have been hard-coded because they are always constant. For a planned new SoC, the register bases will be completely changed. I insist on supporting multiple SoCs/boards by a single defconfig (uniphier_v8_defconfig) since duplicating similar defconfig files is a maintenance burden. The base addresses must be fixed-up at run-time somehow. Previously, the board init code identified the SoC by reading out the SG_REVISION register. This is much easier than parsing DT. You cannot do it any more because the base address of SG will be changed. The SG_REVISION register exists to read out the SoC ID, but you never know its address before identifying the SoC. Oh well. So, the possible solution is to parse the DT, and find out the node with "*-soc-glue" compatible string. Then, sg_base is set to the value of the "reg" property. The sc_base is set up likewise. It is worth noting a pit-fall. Having sc_base and sg_base in the global scope will make the life easier, but the global variables are poorly supported before the relocation. In fact, the .bss section overwraps with DT. Allocating them in the .bss section would break DT. So, I gave dummy initializers to assign them in the .data section. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:42 +09:00
extern void __iomem *sc_base;
ARM: uniphier: de-couple SC macros into base address and offset The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:41 +09:00
#endif
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
ARM: uniphier: de-couple SC macros into base address and offset The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:41 +09:00
#define SC_BASE 0x61840000
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
ARM: uniphier: de-couple SC macros into base address and offset The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:41 +09:00
#define SC_RSTCTRL 0x2000
#define SC_RSTCTRL3 0x2008
#define SC_RSTCTRL4 0x200c
#define SC_RSTCTRL5 0x2010
#define SC_RSTCTRL6 0x2014
#define SC_RSTCTRL7 0x2018
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
ARM: uniphier: de-couple SC macros into base address and offset The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 20:07:41 +09:00
#define SC_CLKCTRL 0x2100
#define SC_CLKCTRL3 0x2108
#define SC_CLKCTRL4 0x210c
#define SC_CLKCTRL5 0x2110
#define SC_CLKCTRL6 0x2114
#define SC_CLKCTRL7 0x2118
#define SC_CA72_GEARST 0x8000
#define SC_CA72_GEARSET 0x8004
#define SC_CA72_GEARUPD 0x8008
#define SC_CA53_GEARST 0x8080
#define SC_CA53_GEARSET 0x8084
#define SC_CA53_GEARUPD 0x8088
ARM: uniphier: add PLL init code for LD11 SoC - Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-22 07:42:19 +09:00
#define SC_CA_GEARUPD (1 << 0)
ARM: uniphier: add System Control register macros for ARMv8 SoCs The System Control block moved to a completely different register map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones. Define register macros in a new header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-18 16:41:51 +09:00
#endif /* SC64_REGS_H */
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