2002-11-18 09:14:45 +09:00
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/*
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* (C) Copyright 2002
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2011-08-05 01:45:45 +09:00
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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2002-11-18 09:14:45 +09:00
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*
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2013-07-08 16:37:19 +09:00
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* SPDX-License-Identifier: GPL-2.0+
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2002-11-18 09:14:45 +09:00
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*/
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2003-03-12 19:41:04 +09:00
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#ifndef _U_BOOT_I386_H_
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#define _U_BOOT_I386_H_ 1
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2002-11-18 09:14:45 +09:00
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2015-06-07 12:33:13 +09:00
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extern char gdt_rom[];
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2002-11-18 09:14:45 +09:00
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/* cpu/.../cpu.c */
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2014-11-07 05:20:06 +09:00
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int arch_cpu_init(void);
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2011-02-12 13:11:35 +09:00
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int x86_cpu_init_f(void);
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2009-11-24 18:04:21 +09:00
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int cpu_init_f(void);
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2011-12-31 20:58:15 +09:00
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void init_gd(gd_t *id, u64 *gdt_addr);
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void setup_gdt(gd_t *id, u64 *gdt_addr);
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2015-06-07 12:33:13 +09:00
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/*
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* Setup FSP execution environment GDT to use the one we used in
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* arch/x86/cpu/start16.S and reload the segment registers.
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*/
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void setup_fsp_gdt(void);
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2011-12-27 20:46:43 +09:00
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int init_cache(void);
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2012-10-20 21:33:10 +09:00
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int cleanup_before_linux(void);
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2009-02-24 19:14:45 +09:00
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/* cpu/.../timer.c */
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void timer_isr(void *);
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typedef void (timer_fnc_t) (void);
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int register_timer_isr (timer_fnc_t *isr_func);
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2013-04-18 01:13:36 +09:00
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unsigned long get_tbclk_mhz(void);
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void timer_set_base(uint64_t base);
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2013-04-18 01:13:39 +09:00
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int pcat_timer_init(void);
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2009-02-24 19:14:45 +09:00
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2009-02-24 19:13:40 +09:00
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/* cpu/.../interrupts.c */
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int cpu_init_interrupts(void);
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2014-11-07 05:20:08 +09:00
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int cleanup_before_linux(void);
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int x86_cleanup_before_linux(void);
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void x86_enable_caches(void);
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void x86_disable_caches(void);
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int x86_init_cache(void);
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void reset_cpu(ulong addr);
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ulong board_get_usable_ram_top(ulong total_size);
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void dram_init_banksize(void);
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2014-11-11 10:00:26 +09:00
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int default_print_cpuinfo(void);
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2014-11-07 05:20:08 +09:00
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2015-01-28 14:13:42 +09:00
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/* Set up a UART which can be used with printch(), printhex8(), etc. */
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int setup_early_uart(void);
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2010-04-23 23:05:48 +09:00
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void setup_pcat_compatibility(void);
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2003-06-01 03:35:21 +09:00
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void isa_unmap_rom(u32 addr);
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u32 isa_map_rom(u32 bus_addr, int size);
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2011-04-13 18:43:28 +09:00
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/* arch/x86/lib/... */
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2003-06-01 03:35:21 +09:00
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int video_bios_init(void);
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2002-11-18 09:14:45 +09:00
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2015-06-07 12:33:14 +09:00
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/* arch/x86/lib/fsp/... */
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int x86_fsp_init(void);
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2012-01-01 13:06:39 +09:00
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void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
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void board_init_f_r(void) __attribute__ ((noreturn));
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2002-11-18 09:14:45 +09:00
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2015-04-24 19:10:06 +09:00
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int arch_misc_init(void);
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2012-10-24 03:04:32 +09:00
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/* Read the time stamp counter */
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2013-06-12 03:14:52 +09:00
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static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
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2012-10-24 03:04:32 +09:00
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{
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uint32_t high, low;
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
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return (((uint64_t)high) << 32) | low;
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}
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/* board/... */
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void timer_set_tsc_base(uint64_t new_base);
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uint64_t timer_get_tsc(void);
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2014-11-13 14:42:28 +09:00
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void quick_ram_check(void);
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2015-04-30 13:26:01 +09:00
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int x86_init_cpus(void);
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2014-12-30 11:32:24 +09:00
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#define PCI_VGA_RAM_IMAGE_START 0xc0000
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2003-03-12 19:41:04 +09:00
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#endif /* _U_BOOT_I386_H_ */
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