2007-08-17 09:23:50 +09:00
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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2012-03-27 06:49:06 +09:00
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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2007-08-17 09:23:50 +09:00
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/immap.h>
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2012-03-27 06:49:06 +09:00
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#include <asm/io.h>
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2007-08-17 09:23:50 +09:00
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* get_clocks() fills in gd->cpu_clock and gd->bus_clk
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*/
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int get_clocks(void)
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{
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2012-03-27 06:49:06 +09:00
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pll_t *pll = (pll_t *)(MMAP_PLL);
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2007-08-17 09:23:50 +09:00
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2012-03-27 06:49:06 +09:00
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out_be32(&pll->syncr, PLL_SYNCR_MFD(1));
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2007-08-17 09:23:50 +09:00
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2012-03-27 06:49:06 +09:00
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while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK))
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;
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2007-08-18 21:33:02 +09:00
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2008-10-16 22:01:15 +09:00
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gd->bus_clk = CONFIG_SYS_CLK;
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2007-08-17 09:23:50 +09:00
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gd->cpu_clk = (gd->bus_clk * 2);
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2007-08-18 21:33:02 +09:00
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2012-10-24 20:48:22 +09:00
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#ifdef CONFIG_SYS_I2C_FSL
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2012-12-14 05:48:49 +09:00
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gd->arch.i2c1_clk = gd->bus_clk;
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2008-08-19 06:01:19 +09:00
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#endif
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2007-08-17 09:23:50 +09:00
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return (0);
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}
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