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2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
100 lines
2.7 KiB
C
100 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* OMAP GPMC (General Purpose Memory Controller) defines
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*/
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#include <linux/platform_data/gpmc-omap.h>
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#define GPMC_CONFIG_WP 0x00000005
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/* IRQ numbers in GPMC IRQ domain for legacy boot use */
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#define GPMC_IRQ_FIFOEVENTENABLE 0
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#define GPMC_IRQ_COUNT_EVENT 1
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/**
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* gpmc_nand_ops - Interface between NAND and GPMC
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* @nand_write_buffer_empty: get the NAND write buffer empty status.
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*/
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struct gpmc_nand_ops {
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bool (*nand_writebuffer_empty)(void);
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};
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struct gpmc_nand_regs;
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struct gpmc_onenand_info {
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bool sync_read;
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bool sync_write;
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int burst_len;
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};
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#if IS_ENABLED(CONFIG_OMAP_GPMC)
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struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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int cs);
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/**
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* gpmc_omap_onenand_set_timings - set optimized sync timings.
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* @cs: Chip Select Region
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* @freq: Chip frequency
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* @latency: Burst latency cycle count
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* @info: Structure describing parameters used
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*
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* Sets optimized timings for the @cs region based on @freq and @latency.
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* Updates the @info structure based on the GPMC settings.
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*/
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int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
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int latency,
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struct gpmc_onenand_info *info);
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#else
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static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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int cs)
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{
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return NULL;
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}
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static inline
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int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
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int latency,
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struct gpmc_onenand_info *info)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_OMAP_GPMC */
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extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
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struct gpmc_settings *gpmc_s,
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struct gpmc_device_timings *dev_t);
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struct device_node;
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extern int gpmc_get_client_irq(unsigned irq_config);
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extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
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extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
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extern int gpmc_calc_divider(unsigned int sync_clk);
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extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
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const struct gpmc_settings *s);
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extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p);
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extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
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extern void gpmc_cs_free(int cs);
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extern int gpmc_configure(int cmd, int wval);
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extern void gpmc_read_settings_dt(struct device_node *np,
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struct gpmc_settings *p);
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extern void omap3_gpmc_save_context(void);
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extern void omap3_gpmc_restore_context(void);
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struct gpmc_timings;
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struct omap_nand_platform_data;
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struct omap_onenand_platform_data;
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#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
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extern int gpmc_onenand_init(struct omap_onenand_platform_data *d);
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#else
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#define board_onenand_data NULL
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static inline int gpmc_onenand_init(struct omap_onenand_platform_data *d)
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{
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return 0;
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}
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#endif
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