linux-brain/arch/arm/boot/dts/ste-href-ab8505.dtsi
Thomas Gleixner fcaf20360a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
Based on 1 normalized pattern(s):

  the code contained herein is licensed under the gnu general public
  license you may obtain a copy of the gnu general public license
  version 2 or later at the following locations http www opensource
  org licenses gpl license html http www gnu org copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00

235 lines
5.0 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2014 Linaro Ltd.
*/
/ {
soc {
prcmu@80157000 {
ab8505 {
ab8505-gpio {
/* Hog a few default settings */
pinctrl-names = "default";
pinctrl-0 = <&gpio2_default_mode>,
<&gpio10_default_mode>,
<&gpio11_default_mode>,
<&gpio13_default_mode>,
<&gpio34_default_mode>,
<&gpio50_default_mode>,
<&pwm_default_mode>,
<&adi2_default_mode>,
<&modsclsda_default_mode>,
<&resethw_default_mode>,
<&service_default_mode>;
/*
* Pins 2, 10, 11, 13, 34 and 50
* are muxed in as GPIO, and configured as INPUT PULL DOWN
*/
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
function = "gpio";
groups = "gpio2_a_1";
};
default_cfg {
pins = "GPIO2_R5";
input-enable;
bias-pull-down;
};
};
};
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
function = "gpio";
groups = "gpio10_d_1";
};
default_cfg {
pins = "GPIO10_B16";
input-enable;
bias-pull-down;
};
};
};
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
function = "gpio";
groups = "gpio11_d_1";
};
default_cfg {
pins = "GPIO11_B17";
input-enable;
bias-pull-down;
};
};
};
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
function = "gpio";
groups = "gpio13_d_1";
};
default_cfg {
pins = "GPIO13_D17";
input-enable;
bias-disable;
};
};
};
gpio34 {
gpio34_default_mode: gpio34_default {
default_mux {
function = "gpio";
groups = "gpio34_a_1";
};
default_cfg {
pins = "GPIO34_H14";
input-enable;
bias-pull-down;
};
};
};
gpio50 {
gpio50_default_mode: gpio50_default {
default_mux {
function = "gpio";
groups = "gpio50_d_1";
};
default_cfg {
pins = "GPIO50_L4";
input-enable;
bias-disable;
};
};
};
/* This sets up the PWM pin 14 */
pwm {
pwm_default_mode: pwm_default {
default_mux {
function = "pwmout";
groups = "pwmout1_d_1";
};
default_cfg {
pins = "GPIO14_C16";
input-enable;
bias-pull-down;
};
};
};
/* This sets up audio interface 2 */
adi2 {
adi2_default_mode: adi2_default {
default_mux {
function = "adi2";
groups = "adi2_d_1";
};
default_cfg {
pins = "GPIO17_P2",
"GPIO18_N3",
"GPIO19_T1",
"GPIO20_P3";
input-enable;
bias-pull-down;
};
};
};
/* Modem I2C setup (SCL and SDA pins) */
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
function = "modsclsda";
groups = "modsclsda_d_1";
};
default_cfg {
pins = "GPIO40_J15",
"GPIO41_J14";
input-enable;
bias-pull-down;
};
};
};
resethw {
resethw_default_mode: resethw_default {
default_mux {
function = "resethw";
groups = "resethw_d_1";
};
default_cfg {
pins = "GPIO52_D16";
input-enable;
bias-pull-down;
};
};
};
service {
service_default_mode: service_default {
default_mux {
function = "service";
groups = "service_d_1";
};
default_cfg {
pins = "GPIO53_D15";
input-enable;
bias-pull-down;
};
};
};
/*
* Clock output pins associated with regulators.
*/
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
function = "sysclkreq";
groups = "sysclkreq2_d_1";
};
default_cfg {
pins = "GPIO1_N4";
input-enable;
bias-disable;
};
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
function = "gpio";
groups = "gpio1_a_1";
};
default_cfg {
pins = "GPIO1_N4";
input-enable;
bias-pull-down;
};
};
};
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
function = "sysclkreq";
groups = "sysclkreq4_d_1";
};
default_cfg {
pins = "GPIO3_P5";
input-enable;
bias-disable;
};
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
function = "gpio";
groups = "gpio3_a_1";
};
default_cfg {
pins = "GPIO3_P5";
input-enable;
bias-pull-down;
};
};
};
};
};
};
};
};