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087a2b7ec9
Commit572cf7d7b0("ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt") changed wlcore interrupts to use edge interrupt based on what's specified in the wl1835mod.pdf data sheet. However, there are still cases where we can have lost interrupts as described in omap_gpio_unidle(). And using a level interrupt instead of edge interrupt helps as we avoid the check for untriggered GPIO interrupts in omap_gpio_unidle(). And with commite6818d29ea("gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup") GPIOs idle just fine with level interrupts. Let's change omap4 and 5 wlcore users back to using level interrupt instead of edge interrupt. Let's not change the others as I've only seen this on omap4 and 5, probably because the other SoCs don't have l4per idle independent of the CPUs. Fixes:572cf7d7b0("ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt") Depends-on:e6818d29ea("gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup") Cc: Anders Roxell <anders.roxell@linaro.org> Cc: Eyal Reizer <eyalr@ti.com> Cc: Guy Mishol <guym@ti.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
76 lines
2.2 KiB
Plaintext
76 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
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*/
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/ {
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/* regulator for wl12xx on sdio4 */
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wl12xx_vmmc: wl12xx_vmmc {
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_ctrl_pins>;
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; /* gpio 43 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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};
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&omap4_pmx_core {
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
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OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
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OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
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OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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>;
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};
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wl12xx_ctrl_pins: pinmux_wl12xx_ctrl_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x062, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a17.gpio_41 (WLAN_IRQ) */
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OMAP4_IOPAD(0x064, PIN_OUTPUT | MUX_MODE3) /* gpmc_a18.gpio_42 (BT_EN) */
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OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 (WLAN_EN) */
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>;
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};
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mmc4_pins: pinmux_mmc4_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x154, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_clk.sdmmc4_clk */
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OMAP4_IOPAD(0x156, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_simo.sdmmc4_cmd */
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OMAP4_IOPAD(0x158, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_somi.sdmmc4_dat0 */
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OMAP4_IOPAD(0x15e, PIN_INPUT_PULLUP | MUX_MODE1) /* uart4_tx.sdmmc4_dat1 */
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OMAP4_IOPAD(0x15c, PIN_INPUT_PULLUP | MUX_MODE1) /* uart4_rx.sdmmc4_dat2 */
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OMAP4_IOPAD(0x15a, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_cs0.sdmmc4_dat3 */
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>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&mmc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc4_pins>;
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vmmc-supply = <&wl12xx_vmmc>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1271";
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reg = <2>;
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interrupt-parent = <&gpio2>;
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interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */
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ref-clock-frequency = <38400000>;
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};
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};
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