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5691e22711
* tag 'v5.4.47': (2193 commits) Linux 5.4.47 KVM: arm64: Save the host's PtrAuth keys in non-preemptible context KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception ... Conflicts: arch/arm/boot/dts/imx6qdl.dtsi arch/arm/mach-imx/Kconfig arch/arm/mach-imx/common.h arch/arm/mach-imx/suspend-imx6.S arch/arm64/boot/dts/freescale/imx8qxp-mek.dts arch/powerpc/include/asm/cacheflush.h drivers/cpufreq/imx6q-cpufreq.c drivers/dma/imx-sdma.c drivers/edac/synopsys_edac.c drivers/firmware/imx/imx-scu.c drivers/net/ethernet/freescale/fec.h drivers/net/ethernet/freescale/fec_main.c drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c drivers/net/phy/phy_device.c drivers/perf/fsl_imx8_ddr_perf.c drivers/usb/cdns3/gadget.c drivers/usb/dwc3/gadget.c include/uapi/linux/dma-buf.h Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
146 lines
3.3 KiB
Plaintext
146 lines
3.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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//
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// Copyright 2016 Freescale Semiconductor, Inc.
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#include "imx6q.dtsi"
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/ {
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aliases {
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pre0 = &pre1;
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pre1 = &pre2;
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pre2 = &pre3;
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pre3 = &pre4;
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prg0 = &prg1;
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prg1 = &prg2;
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};
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soc {
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ocram2: sram@940000 {
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compatible = "mmio-sram";
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reg = <0x00940000 0x20000>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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ocram3: sram@960000 {
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compatible = "mmio-sram";
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reg = <0x00960000 0x20000>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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aips-bus@2100000 {
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pre1: pre@21c8000 {
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compatible = "fsl,imx6q-pre";
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reg = <0x021c8000 0x1000>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clks IMX6QDL_CLK_PRE0>;
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clock-names = "axi";
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ocram = <&ocram2>;
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status = "disabled";
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};
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pre2: pre@21c9000 {
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compatible = "fsl,imx6q-pre";
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reg = <0x021c9000 0x1000>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clks IMX6QDL_CLK_PRE1>;
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clock-names = "axi";
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ocram = <&ocram2>;
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status = "disabled";
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};
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pre3: pre@21ca000 {
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compatible = "fsl,imx6q-pre";
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reg = <0x021ca000 0x1000>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clks IMX6QDL_CLK_PRE2>;
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clock-names = "axi";
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ocram = <&ocram3>;
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status = "disabled";
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};
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pre4: pre@21cb000 {
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compatible = "fsl,imx6q-pre";
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reg = <0x021cb000 0x1000>;
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interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clks IMX6QDL_CLK_PRE3>;
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clock-names = "axi";
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ocram = <&ocram3>;
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status = "disabled";
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};
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prg1: prg@21cc000 {
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compatible = "fsl,imx6q-prg";
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reg = <0x021cc000 0x1000>;
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clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
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<&clks IMX6QDL_CLK_PRG0_AXI>;
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clock-names = "apb", "axi";
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gpr = <&gpr>;
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status = "disabled";
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};
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prg2: prg@21cd000 {
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compatible = "fsl,imx6q-prg";
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reg = <0x021cd000 0x1000>;
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clocks = <&clks IMX6QDL_CLK_PRG1_APB>,
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<&clks IMX6QDL_CLK_PRG1_AXI>;
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clock-names = "apb", "axi";
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gpr = <&gpr>;
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status = "disabled";
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};
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};
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};
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};
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&fec {
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interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
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<0 119 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpc {
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compatible = "fsl,imx6qp-gpc", "fsl,imx6q-gpc";
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};
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&ipu1 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU1>,
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<&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
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<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_DIV_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_DIV_SEL>,
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<&clks IMX6QDL_CLK_PRG0_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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fsl,prg = <&prg1>;
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};
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&ipu2 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU2>,
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<&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
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<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_DIV_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_DIV_SEL>,
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<&clks IMX6QDL_CLK_PRG1_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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fsl,prg = <&prg2>;
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};
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&ldb {
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compatible = "fsl,imx6qp-ldb", "fsl,imx6q-ldb", "fsl,imx53-ldb";
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};
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&mmdc0 {
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compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
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};
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&pcie {
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compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
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};
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&pcie_ep {
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compatible = "fsl,imx6qp-pcie-ep";
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};
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