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https://github.com/brain-hackers/linux-brain.git
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cabe5f85e6
The baseboard of the Logic PD i.MX6 development kit has a power
button routed which can both power down and power up the board.
It can also wake the board from sleep. This functionality was
marked as disabled by default in imx6qdl.dtsi, so it needs to
be explicitly enabled for each board.
This patch enables the snvs power key again.
Signed-off-by: Adam Ford <aford173@gmail.com>
Fixes: 770856f0da ("ARM: dts: imx6qdl: Enable SNVS power key according to board design")
Cc: stable <stable@vger.kernel.org> #5.3+
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
562 lines
12 KiB
Plaintext
562 lines
12 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (C) 2019 Logic PD, Inc.
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/ {
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keyboard {
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compatible = "gpio-keys";
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btn0 {
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gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>;
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label = "btn0";
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linux,code = <KEY_WAKEUP>;
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debounce-interval = <10>;
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wakeup-source;
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};
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btn1 {
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gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>;
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label = "btn1";
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linux,code = <KEY_WAKEUP>;
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debounce-interval = <10>;
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wakeup-source;
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};
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btn2 {
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gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>;
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label = "btn2";
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linux,code = <KEY_WAKEUP>;
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debounce-interval = <10>;
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wakeup-source;
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};
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btn3 {
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gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;
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label = "btn3";
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linux,code = <KEY_WAKEUP>;
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debounce-interval = <10>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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gen-led0 {
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label = "led0";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led0>;
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gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu0";
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};
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gen-led1 {
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label = "led1";
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gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;
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};
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gen-led2 {
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label = "led2";
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gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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gen-led3 {
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label = "led3";
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gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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};
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reg_usb_otg_vbus: regulator-otg-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usb_otg>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_h1_vbus: regulator-usb-h1-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>;
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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reg_3v3: regulator-3v3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_3v3>;
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compatible = "regulator-fixed";
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regulator-name = "reg_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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regulator-always-on;
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};
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reg_enet: regulator-ethernet {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_enet>;
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compatible = "regulator-fixed";
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regulator-name = "ethernet-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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vin-supply = <&sw4_reg>;
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};
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reg_audio: regulator-audio {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_audio>;
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compatible = "regulator-fixed";
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regulator-name = "3v3_aud";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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vin-supply = <®_3v3>;
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};
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reg_hdmi: regulator-hdmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_hdmi>;
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compatible = "regulator-fixed";
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regulator-name = "hdmi-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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vin-supply = <®_3v3>;
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};
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reg_uart3: regulator-uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_uart3>;
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compatible = "regulator-fixed";
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regulator-name = "uart3-supply";
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gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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vin-supply = <®_3v3>;
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};
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reg_1v8: regulator-1v8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_1v8>;
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compatible = "regulator-fixed";
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regulator-name = "1v8-supply";
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gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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vin-supply = <®_3v3>;
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};
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reg_pcie: regulator-pcie {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_pcie>;
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regulator-name = "mpcie_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_mipi: regulator-mipi {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_mipi>;
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regulator-name = "mipi_pwr_en";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sound {
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compatible = "fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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ssi-controller = <&ssi2>;
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audio-codec = <&wm8962>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"AMIC", "MICBIAS",
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"IN3R", "AMIC";
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mux-int-port = <2>;
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mux-ext-port = <4>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "disabled";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-reset-duration = <10>;
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phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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phy-supply = <®_enet>;
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interrupt-parent = <&gpio1>;
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interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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clock-frequency = <400000>;
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status = "okay";
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wm8962: audio-codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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clock-names = "xclk";
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0000 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x0000 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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};
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&i2c3 {
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ov5640: camera@10 {
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compatible = "ovti,ov5640";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ov5640>;
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reg = <0x10>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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clock-names = "xclk";
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DOVDD-supply = <®_mipi>;
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AVDD-supply = <®_mipi>;
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DVDD-supply = <®_mipi>;
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reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
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powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
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port {
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ov5640_to_mipi_csi2: endpoint {
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remote-endpoint = <&mipi_csi2_in>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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pcf8575: gpio@20 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcf8574>;
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compatible = "nxp,pcf8575";
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reg = <0x20>;
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interrupt-parent = <&gpio6>;
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interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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lines-initial-states = <0x0710>;
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wakeup-source;
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};
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};
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&ipu1_csi1_from_mipi_vc1 {
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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&mipi_csi {
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status = "okay";
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port@0 {
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reg = <0>;
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mipi_csi2_in: endpoint {
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remote-endpoint = <&ov5640_to_mipi_csi2>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
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vpcie-supply = <®_pcie>;
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status = "okay";
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&ssi2 {
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&usbh1 {
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vbus-supply = <®_usb_h1_vbus>;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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dr_mode = "otg";
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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vmmc-supply = <®_3v3>;
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no-1-8-v;
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keep-power-in-suspend;
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cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
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MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
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MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
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MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
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MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x100b1
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* ENET_INT */
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MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1b0b0 /* ETHR_nRST */
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_led0: led0grp {
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fsl,pins = <
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MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
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>;
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};
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pinctrl_ov5640: ov5640grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b1
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MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b1
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>;
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};
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pinctrl_pcf8574: pcf8575grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
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>;
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};
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
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MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
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>;
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};
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pinctrl_pwm3: pwm3grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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>;
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};
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pinctrl_reg_1v8: reg1v8grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
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>;
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};
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pinctrl_reg_3v3: reg3v3grp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0
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>;
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};
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pinctrl_reg_audio: reg-audiogrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
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>;
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};
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pinctrl_reg_enet: reg-enetgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
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>;
|
|
};
|
|
|
|
pinctrl_reg_hdmi: reg-hdmigrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_mipi: reg-mipigrp {
|
|
fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;
|
|
};
|
|
|
|
pinctrl_reg_pcie: reg-pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_uart3: reguart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_usb_h1_vbus: usbh1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_usb_otg: reg-usb-otggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0xd17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17069
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17069
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17069
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17069
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17069
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
|
|
>;
|
|
};
|
|
|
|
};
|