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fcaf20360a
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
180 lines
4.7 KiB
Plaintext
180 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "imx53.dtsi"
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/ {
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model = "Freescale i.MX53 Automotive Reference Design Board";
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compatible = "fsl,imx53-ard", "fsl,imx53";
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memory@70000000 {
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device_type = "memory";
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reg = <0x70000000 0x40000000>;
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};
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eim-cs1@f4000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,eim-bus", "simple-bus";
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reg = <0xf4000000 0x3ff0000>;
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ranges;
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lan9220@f4000000 {
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compatible = "smsc,lan9220", "smsc,lan9115";
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reg = <0xf4000000 0x2000000>;
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phy-mode = "mii";
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interrupt-parent = <&gpio2>;
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interrupts = <31 0x8>;
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reg-io-width = <4>;
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/*
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* VDD33A and VDDVARIO of LAN9220 are supplied by
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* SW4_3V3 of LTC3589. Before the regulator driver
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* for this PMIC is available, we use a fixed dummy
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* 3V3 regulator to get LAN9220 driver probing work.
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*/
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vdd33a-supply = <®_3p3v>;
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vddvario-supply = <®_3p3v>;
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smsc,irq-push-pull;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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home {
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label = "Home";
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gpios = <&gpio5 10 0>;
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linux,code = <KEY_HOME>;
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wakeup-source;
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};
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back {
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label = "Back";
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gpios = <&gpio5 11 0>;
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linux,code = <KEY_BACK>;
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wakeup-source;
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};
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program {
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label = "Program";
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gpios = <&gpio5 12 0>;
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linux,code = <KEY_PROGRAM >;
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wakeup-source;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio5 13 0>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio4 0 0>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx53-ard {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX53_PAD_GPIO_1__GPIO1_1 0x80000000
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MX53_PAD_GPIO_9__GPIO1_9 0x80000000
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MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
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MX53_PAD_GPIO_10__GPIO4_0 0x80000000
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MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
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MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
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MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
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MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
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MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
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MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
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MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
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MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
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MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
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MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
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MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
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MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
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MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
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MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
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MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
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MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
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MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
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MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
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MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
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MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
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MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
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MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
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MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
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MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
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MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
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MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
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MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
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MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
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MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
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MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
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MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5
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MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5
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MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5
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MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5
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MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
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MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
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MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
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>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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