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Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
119 lines
2.2 KiB
Plaintext
119 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
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*/
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#include "imx51-digi-connectcore-som.dtsi"
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/ {
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model = "Digi ConnectCore CC(W)-MX51 JSK";
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compatible = "digi,connectcore-ccxmx51-jsk",
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"digi,connectcore-ccxmx51-som", "fsl,imx51";
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chosen {
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stdout-path = &uart1;
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};
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};
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&esdhc1 {
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status = "okay";
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};
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&owire {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_owire>;
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status = "okay";
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};
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&pmic {
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fsl,mc13xxx-uses-rtc;
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regulators {
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vcoincell_reg: vcoincell {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&usbotg {
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dr_mode = "otg";
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status = "okay";
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};
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&usbh1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh1>;
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dr_mode = "host";
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phy_type = "ulpi";
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disable-over-current;
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status = "okay";
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};
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&iomuxc {
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imx51-digi-connectcore-jsk {
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pinctrl_owire: owiregrp {
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fsl,pins = <
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MX51_PAD_OWIRE_LINE__OWIRE_LINE 0x40000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
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MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
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MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
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MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
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>;
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};
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pinctrl_usbh1: usbh1grp {
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fsl,pins = <
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MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
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MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
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MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
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MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
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MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
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MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
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MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
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MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
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MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
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MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
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MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
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MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
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>;
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};
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};
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};
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