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fcaf20360a
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
113 lines
2.1 KiB
Plaintext
113 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
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* Copyright 2012 Armadeus Systems <support@armadeus.com>
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*
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* Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
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*/
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/dts-v1/;
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#include "imx27.dtsi"
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/ {
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model = "Armadeus Systems APF27 module";
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compatible = "armadeus,imx27-apf27", "fsl,imx27";
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memory@a0000000 {
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device_type = "memory";
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reg = <0xa0000000 0x04000000>;
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};
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};
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&clk_osc26m {
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clock-frequency = <0>;
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};
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&iomuxc {
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imx27-apf27 {
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX27_PAD_SD3_CMD__FEC_TXD0 0x0
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MX27_PAD_SD3_CLK__FEC_TXD1 0x0
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MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
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MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
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MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
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MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
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MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
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MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
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MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
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MX27_PAD_ATA_DATA7__FEC_MDC 0x0
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MX27_PAD_ATA_DATA8__FEC_CRS 0x0
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MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
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MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
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MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
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MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
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MX27_PAD_ATA_DATA13__FEC_COL 0x0
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MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
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MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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status = "okay";
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};
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&nfc {
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status = "okay";
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nand-bus-width = <16>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x100000>;
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};
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partition@100000 {
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label = "env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "env2";
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reg = <0x180000 0x80000>;
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};
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partition@200000 {
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label = "firmware";
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reg = <0x200000 0x80000>;
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};
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partition@280000 {
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label = "dtb";
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reg = <0x280000 0x80000>;
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};
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partition@300000 {
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label = "kernel";
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reg = <0x300000 0x500000>;
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};
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partition@800000 {
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label = "rootfs";
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reg = <0x800000 0xf800000>;
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};
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};
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