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ca36855ef0
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
80 lines
1.4 KiB
Plaintext
80 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for Marvell Armada XP Matrix board
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*
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* Copyright (C) 2013 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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*/
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/dts-v1/;
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#include "armada-xp-mv78460.dtsi"
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/ {
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model = "Marvell Armada XP Matrix Board";
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compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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/*
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* This board has 4 GB of RAM, but the last 256 MB of
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* RAM are not usable due to the overlap with the MBus
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* Window address range
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*/
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reg = <0 0x00000000 0 0xf0000000>;
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
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internal-regs {
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serial@12000 {
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status = "okay";
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};
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serial@12100 {
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status = "okay";
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};
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serial@12200 {
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status = "okay";
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};
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serial@12300 {
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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ethernet@30000 {
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status = "okay";
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phy-mode = "sgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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usb@50000 {
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status = "okay";
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};
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};
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};
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};
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&pciec {
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status = "okay";
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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};
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