111 lines
2.5 KiB
Plaintext
111 lines
2.5 KiB
Plaintext
/*
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* Copyright 2018 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "fsl-imx8mq-evk.dts"
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/ {
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interrupt-parent = <&gic>;
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};
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/delete-node/ &gpc;
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&CPU_SLEEP {
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/* We are not using GPC for now, need set 0 to avoid hang */
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arm,psci-suspend-param = <0x0>;
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};
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&clk {
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init-on-array = <IMX8MQ_CLK_DRAM_CORE IMX8MQ_CLK_AHB
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IMX8MQ_CLK_NOC IMX8MQ_CLK_NOC_APB
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IMX8MQ_CLK_USB_BUS
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IMX8MQ_CLK_MAIN_AXI IMX8MQ_CLK_A53_CG
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IMX8MQ_CLK_AUDIO_AHB IMX8MQ_CLK_TMU_ROOT
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IMX8MQ_CLK_DRAM_APB
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IMX8MQ_CLK_UART2_ROOT
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IMX8MQ_CLK_UART2
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IMX8MQ_CLK_NAND_USDHC_BUS>;
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};
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&iomuxc {
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imx8mq-evk {
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/*
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* Used for the 2nd Linux.
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* TODO: M4 may use these pins.
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*/
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
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MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
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>;
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};
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};
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};
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&{/busfreq} {
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/* Disable busfreq, to avoid 1st Linux busfreq crash other inmates */
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status = "disabled";
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};
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&resmem {
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jh_reserved: jh@0xfdc00000 {
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no-map;
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reg = <0 0xfdc00000 0x0 0x400000>;
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};
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inmate_reserved: inmate@0xc0000000 {
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no-map;
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reg = <0 0xc0000000 0x0 0x3dc00000>;
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};
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loader_reserved: loader@0xbff00000 {
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no-map;
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reg = <0 0xbff00000 0x0 0x00100000>;
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};
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ivshmem_reserved: ivshmem@0xbfe00000 {
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no-map;
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reg = <0 0xbfe00000 0x0 0x00100000>;
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};
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ivshmem2_reserved: ivshmem2@0xbfd00000 {
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no-map;
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reg = <0 0xbfd00000 0x0 0x00100000>;
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};
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pci_reserved: pci@0xbfc00000 {
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no-map;
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reg = <0 0xbfb00000 0x0 0x00200000>;
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};
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};
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&uart1 {
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/* uart2 is used by the 2nd OS, so configure pin and clk */
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pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart2>;
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assigned-clocks = <&clk IMX8MQ_CLK_UART1>,
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<&clk IMX8MQ_CLK_UART2>;
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assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,
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<&clk IMX8MQ_CLK_25M>;
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};
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&usdhc1 {
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status = "disabled";
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};
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&usdhc2 {
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/* sdhc1 is used by 2nd linux, configure the pin */
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pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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};
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