linux-brain/arch/arm/boot/dts/sun8i-a23.dtsi
Chen-Yu Tsai 4672f69561
ARM: dts: sun8i-a23: Add compatible strings to display pipeline device nodes
Now that the compatible strings for the display pipeline on the A23 have
been added to the bindings, add the corresponding compatibles to the
device nodes already in the A23/A33 shared dtsi.

While the A23 has the TCON ch1 clock defined in the CCU, and the channel
1 registers are available, it does not have any means to use channel 1
due to a lack of downstream encoders, and the enable bit for channel 1 is
hard-wired to 0 (off). Hence the ch1 clock is left out.

As the MIPI DSI output device is not officially documented, and there
are no reference devices to test it, it is not covered by this patch.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-25 10:43:12 +01:00

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/*
* Copyright 2014 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
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* The above copyright notice and this permission notice shall be
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*/
#include "sun8i-a23-a33.dtsi"
/ {
soc {
codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-a23-codec";
reg = <0x01c22c00 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
clock-names = "apb", "codec";
resets = <&ccu RST_BUS_CODEC>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <&codec_analog>;
status = "disabled";
};
};
};
&be0 {
compatible = "allwinner,sun8i-a23-display-backend";
};
&ccu {
compatible = "allwinner,sun8i-a23-ccu";
};
&de {
compatible = "allwinner,sun8i-a23-display-engine";
};
&drc0 {
compatible = "allwinner,sun8i-a23-drc";
};
&fe0 {
compatible = "allwinner,sun8i-a23-display-frontend";
};
&pio {
compatible = "allwinner,sun8i-a23-pinctrl";
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
};
&tcon0 {
compatible = "allwinner,sun8i-a23-tcon";
};
&usb_otg {
compatible = "allwinner,sun6i-a31-musb";
};
&usbphy {
compatible = "allwinner,sun8i-a23-usb-phy";
reg = <0x01c19400 0x10>, <0x01c1a800 0x4>;
reg-names = "phy_ctrl", "pmu1";
};