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fcaf20360a
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
129 lines
2.5 KiB
Plaintext
129 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 ST-Ericsson AB
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*
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* Device Tree for the HREF+ prior to the v60 variant.
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*/
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#include "ste-dbx5x0.dtsi"
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#include "ste-href-ab8500.dtsi"
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#include "ste-href.dtsi"
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/ {
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gpio_keys {
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button@1 {
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gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
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};
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};
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soc {
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/* Enable UART1 on this board */
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uart@80121000 {
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status = "okay";
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};
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i2c@80004000 {
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tps61052@33 {
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compatible = "ti,tps61052";
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reg = <0x33>;
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};
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tc35892@42 {
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compatible = "toshiba,tc35892";
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reg = <0x42>;
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interrupt-parent = <&gpio6>;
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interrupts = <25 IRQ_TYPE_EDGE_RISING>;
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pinctrl-names = "default";
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pinctrl-0 = <&tc35892_hrefprev60_mode>;
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interrupt-controller;
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#interrupt-cells = <1>;
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tc3589x_gpio: tc3589x_gpio {
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compatible = "tc3589x-gpio";
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interrupts = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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spi@80002000 {
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/*
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* On the first generation boards, this SSP/SPI port was connected
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* to the AB8500.
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&ssp0_hrefprev60_mode>;
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};
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// External Micro SD slot
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sdi0_per1@80126000 {
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cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
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};
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vmmci: regulator-gpio {
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gpios = <&tc3589x_gpio 18 GPIO_ACTIVE_HIGH>;
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enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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pinctrl {
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/* Set this up using hogs */
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pinctrl-names = "default";
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pinctrl-0 = <&ipgpio_hrefprev60_mode>;
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ssp0 {
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ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
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hrefprev60_mux {
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function = "ssp0";
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groups = "ssp0_a_1";
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};
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hrefprev60_cfg1 {
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pins = "GPIO145_C13"; /* RXD */
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ste,config = <&in_pd>;
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};
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};
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};
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sdi0 {
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/* This additional pin needed on early MOP500 and HREFs previous to v60 */
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sdi0_default_mode: sdi0_default {
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hrefprev60_mux {
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function = "mc0";
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groups = "mc0dat31dir_a_1";
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};
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hrefprev60_cfg1 {
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pins = "GPIO21_AB3"; /* DAT31DIR */
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ste,config = <&out_hi>;
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};
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};
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};
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tc35892 {
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tc35892_hrefprev60_mode: tc35892_hrefprev60 {
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hrefprev60_cfg {
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pins = "GPIO217_AH12";
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ste,config = <&gpio_in_pu>;
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};
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};
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};
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ipgpio {
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ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
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hrefprev60_mux {
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function = "ipgpio";
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groups = "ipgpio0_c_1", "ipgpio1_c_1";
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};
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hrefprev60_cfg1 {
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pins = "GPIO6_AF6", "GPIO7_AG5";
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ste,config = <&in_pu>;
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};
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};
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};
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};
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};
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};
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