mirror of
https://github.com/brain-hackers/linux-brain.git
synced 2024-06-09 23:36:23 +09:00
0ae1177480
Use the new bindings of the Marvell NAND controller driver. Also adapt the NAND controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the new driver activates the arbiter by default for all boards which is either needed or harmless. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
135 lines
2.2 KiB
Plaintext
135 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Device Tree Include file for Marvell Armada 398 Development Board
|
|
*
|
|
* Copyright (C) 2015 Marvell
|
|
*
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "armada-398.dtsi"
|
|
|
|
/ {
|
|
model = "Marvell Armada 398 Development Board";
|
|
compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x80000000>; /* 2 GB */
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
|
|
|
internal-regs {
|
|
i2c@11000 {
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
serial@12000 {
|
|
pinctrl-0 = <&uart0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
serial@12100 {
|
|
pinctrl-0 = <&uart1_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
usb@58000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb3@f8000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
pcie {
|
|
status = "okay";
|
|
|
|
pcie@1,0 {
|
|
status = "okay";
|
|
};
|
|
|
|
pcie@2,0 {
|
|
status = "okay";
|
|
};
|
|
|
|
pcie@3,0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi1 {
|
|
status = "okay";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
spi-flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "n25q128a13", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <108000000>;
|
|
|
|
partition@0 {
|
|
label = "U-Boot";
|
|
reg = <0 0x400000>;
|
|
};
|
|
|
|
partition@400000 {
|
|
label = "Filesystem";
|
|
reg = <0x400000 0x1000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&nand_controller {
|
|
status = "okay";
|
|
pinctrl-0 = <&nand_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
nand@0 {
|
|
reg = <0>;
|
|
label = "pxa3xx_nand-0";
|
|
nand-rb = <0>;
|
|
marvell,nand-keep-config;
|
|
nand-on-flash-bbt;
|
|
nand-ecc-strength = <8>;
|
|
nand-ecc-step-size = <512>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "U-Boot";
|
|
reg = <0 0x800000>;
|
|
};
|
|
partition@800000 {
|
|
label = "Linux";
|
|
reg = <0x800000 0x800000>;
|
|
};
|
|
partition@1000000 {
|
|
label = "Filesystem";
|
|
reg = <0x1000000 0x3f000000>;
|
|
};
|
|
};
|
|
};
|
|
};
|