124 lines
1.5 KiB
Plaintext
124 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 NXP
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* Oliver Brown <oliver.brown@nxp.com>
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*/
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/* Three displays enabled: DP, LVDS, and MIPI DSI */
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/dts-v1/;
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#include "imx8qm-mek-rpmsg.dts"
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/ {
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sound-hdmi-tx {
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compatible = "fsl,imx-audio-cdnhdmi";
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model = "imx-audio-hdmi-tx";
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audio-cpu = <&sai5>;
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protocol = <1>;
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hdmi-out;
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};
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sound-hdmi-arc {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-hdmi-arc";
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spdif-controller = <&spdif1>;
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spdif-in;
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spdif-out;
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};
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};
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&sai5 {
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status = "okay";
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};
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&sai5_lpcg {
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status = "okay";
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};
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&ldb1_phy {
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status = "disabled";
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};
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&ldb1 {
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status = "disabled";
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};
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&ldb2_phy {
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status = "disabled";
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};
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&ldb2 {
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status = "disabled";
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};
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&mipi0_dphy {
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status = "disabled";
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};
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&mipi0_dsi_host {
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status = "disabled";
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};
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&irqsteer_hdmi {
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status = "okay";
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};
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&hdmi_lpcg_i2c0 {
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status = "okay";
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};
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&hdmi_lpcg_lis_ipg {
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status = "okay";
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};
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&hdmi_lpcg_pwm_ipg {
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status = "okay";
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};
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&hdmi_lpcg_i2s {
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status = "okay";
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};
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&hdmi_lpcg_gpio_ipg {
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status = "okay";
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};
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&hdmi_lpcg_msi_hclk {
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status = "okay";
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};
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&hdmi_lpcg_pxl {
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status = "okay";
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};
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&hdmi_lpcg_phy {
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status = "okay";
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};
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&hdmi_lpcg_apb_mux_csr {
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status = "okay";
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};
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&hdmi_lpcg_apb_mux_ctrl {
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status = "okay";
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};
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&hdmi_lpcg_apb {
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status = "okay";
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};
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&hdmi {
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compatible = "cdn,imx8qm-dp";
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firmware-name = "dpfw.bin";
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lane-mapping = <0x1b>;
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status = "okay";
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};
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&spdif1 {
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status = "okay";
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};
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&spdif1_lpcg {
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status = "okay";
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};
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