31 lines
889 B
Plaintext
31 lines
889 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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gpu0_subsys: bus@53100000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x53100000 0x0 0x53100000 0x40000>,
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<0x80000000 0x0 0x80000000 0x80000000>,
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<0x0 0x0 0x0 0x10000000>;
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gpu_3d0: gpu@53100000 {
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compatible = "fsl,imx8-gpu";
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reg = <0x53100000 0x40000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>,
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<&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>;
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clock-names = "core", "shader";
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assigned-clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>,
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<&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>;
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assigned-clock-rates = <700000000>, <850000000>;
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power-domains = <&pd IMX_SC_R_GPU_0_PID0>;
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status = "disabled";
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};
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};
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