linux-brain/arch/powerpc/include/asm/book3s/64
Aneesh Kumar K.V 7ab2eb7ce7 powerpc/hash64/devmap: Use H_PAGE_THP_HUGE when setting up huge devmap PTE entries
commit 36b78402d97a3b9aeab136feb9b00d8647ec2c20 upstream.

H_PAGE_THP_HUGE is used to differentiate between a THP hugepage and
hugetlb hugepage entries. The difference is WRT how we handle hash
fault on these address. THP address enables MPSS in segments. We want
to manage devmap hugepage entries similar to THP pt entries. Hence use
H_PAGE_THP_HUGE for devmap huge PTE entries.

With current code while handling hash PTE fault, we do set is_thp =
true when finding devmap PTE huge PTE entries.

Current code also does the below sequence we setting up huge devmap
entries.

	entry = pmd_mkhuge(pfn_t_pmd(pfn, prot));
	if (pfn_t_devmap(pfn))
		entry = pmd_mkdevmap(entry);

In that case we would find both H_PAGE_THP_HUGE and PAGE_DEVMAP set
for huge devmap PTE entries. This results in false positive error like
below.

  kernel BUG at /home/kvaneesh/src/linux/mm/memory.c:4321!
  Oops: Exception in kernel mode, sig: 5 [#1]
  LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries
  Modules linked in:
  CPU: 56 PID: 67996 Comm: t_mmap_dio Not tainted 5.6.0-rc4-59640-g371c804dedbc #128
  ....
  NIP [c00000000044c9e4] __follow_pte_pmd+0x264/0x900
  LR [c0000000005d45f8] dax_writeback_one+0x1a8/0x740
  Call Trace:
    str_spec.74809+0x22ffb4/0x2d116c (unreliable)
    dax_writeback_one+0x1a8/0x740
    dax_writeback_mapping_range+0x26c/0x700
    ext4_dax_writepages+0x150/0x5a0
    do_writepages+0x68/0x180
    __filemap_fdatawrite_range+0x138/0x180
    file_write_and_wait_range+0xa4/0x110
    ext4_sync_file+0x370/0x6e0
    vfs_fsync_range+0x70/0xf0
    sys_msync+0x220/0x2e0
    system_call+0x5c/0x68

This is because our pmd_trans_huge check doesn't exclude _PAGE_DEVMAP.

To make this all consistent, update pmd_mkdevmap to set
H_PAGE_THP_HUGE and pmd_trans_huge check now excludes _PAGE_DEVMAP
correctly.

Fixes: ebd3119793 ("powerpc/mm: Add devmap support for ppc64")
Cc: stable@vger.kernel.org # v4.13+
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200313094842.351830-1-aneesh.kumar@linux.ibm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-17 10:48:53 +02:00
..
hash-4k.h powerpc/hash64/devmap: Use H_PAGE_THP_HUGE when setting up huge devmap PTE entries 2020-04-17 10:48:53 +02:00
hash-64k.h powerpc/hash64/devmap: Use H_PAGE_THP_HUGE when setting up huge devmap PTE entries 2020-04-17 10:48:53 +02:00
hash.h powerpc: move ASM_CONST and stringify_in_c() into asm-const.h 2018-07-30 22:48:16 +10:00
hugetlb.h powerpc/hugetlb: Don't do runtime allocation of 16G pages in LPAR configuration 2019-03-23 20:10:08 +01:00
mmu-hash.h powerpc/64s: move machine check SLB flushing to mm/slb.c 2018-08-10 22:12:39 +10:00
mmu.h powerpc/mm: Implement helpers for pagetable fragment support at PMD level 2018-05-15 22:29:12 +10:00
pgalloc.h powerpc/book3s/64: check for NULL pointer in pgd_alloc() 2019-05-16 19:41:31 +02:00
pgtable-4k.h powerpc/mm/hash/4k: Free hugetlb page table caches correctly. 2018-06-20 09:13:25 +10:00
pgtable-64k.h powerpc/mm/hash/4k: Free hugetlb page table caches correctly. 2018-06-20 09:13:25 +10:00
pgtable.h powerpc/hash64/devmap: Use H_PAGE_THP_HUGE when setting up huge devmap PTE entries 2020-04-17 10:48:53 +02:00
radix-4k.h powerpc/mm: Implement helpers for pagetable fragment support at PMD level 2018-05-15 22:29:12 +10:00
radix-64k.h powerpc/mm: Implement helpers for pagetable fragment support at PMD level 2018-05-15 22:29:12 +10:00
radix.h powerpc/hash64/devmap: Use H_PAGE_THP_HUGE when setting up huge devmap PTE entries 2020-04-17 10:48:53 +02:00
slice.h powerpc/mm/slice: create header files dedicated to slices 2018-03-06 09:21:22 +11:00
tlbflush-hash.h powerpc/64s: Improve local TLB flush for boot and MCE on POWER9 2018-01-18 00:40:31 +11:00
tlbflush-radix.h powerpc/64s: Remove POWER9 DD1 support 2018-07-16 11:37:21 +10:00
tlbflush.h powerpc/64s/radix: do not flush TLB on spurious fault 2018-06-03 20:40:35 +10:00