mirror of
https://github.com/brain-hackers/linux-brain.git
synced 2024-06-09 23:36:23 +09:00
8604ac9224
commit c737abc193 upstream.
Armada-37xx UART0 registers are 0x200 bytes wide. Right next to them are
the UART1 registers that should not be declared in this node.
Update the example in DT bindings document accordingly.
Signed-off-by: allen yan <yanwei@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 lines
362 B
Plaintext
14 lines
362 B
Plaintext
* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
|
|
|
|
Required properties:
|
|
- compatible: "marvell,armada-3700-uart"
|
|
- reg: offset and length of the register set for the device.
|
|
- interrupts: device interrupt
|
|
|
|
Example:
|
|
serial@12000 {
|
|
compatible = "marvell,armada-3700-uart";
|
|
reg = <0x12000 0x200>;
|
|
interrupts = <43>;
|
|
};
|