mirror of
https://github.com/brain-hackers/linux-brain.git
synced 2024-06-09 23:36:23 +09:00
24e44913aa
SoC platform changes. Main theme this merge window:
- The Netx platform (Netx 100/500) platform is removed by Linus Walleij--
the SoC doesn't have active maintainers with hardware, and in
discussions with the vendor the agreement was that it's OK to remove.
- Russell King has a series of patches that cleans up and refactors
SA1101 and RiscPC support.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yKOgPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3SNEP/iJsMeeunX0P7Ym3zNFjykhspkkUmo7sEKuz
NBcexnQpkm+OLgjfwT7j3kXvOs4mzMzH56J6h7dEDSHbQP1MDIgpMw6OEzMMsQTV
XL1AWz1IO7Sq/mG17daPs9c75o6NYQ7pSEd/ncbjKuJQOpGsi4DyrVrhk9WdzYl2
hcs4XOzOMZgDTsXHVdWkfpHazpWxEXPCD7v5bt6ueU0YnT3csUbzOTTvw+55JxRV
fYz0lg4wTMRYMQMOejpx1HXwdmbVOHLUYkCxcLUaVqMnm88q/IddJVklBbPGWAU5
Z4gFpL+FxcFhEZtu28CoubPYzf/mHDk8Ry2UWwBiRwiGoKfblomI1fpnbyrX53aE
lpO5p7MfOVVV2WNxpbUND+ilbgKOREfRHd314GLPUjwudp2sTuDRZ1GAbt3JwsIM
L1HesyjCtb6itCSwGsmmGsX2Wvu+WT7slpsYwHs2qklE/X1zQq0R4Jf2xUNpwqPb
FqGZAtc6CCQtyF/Mcpp6OQd+cV0tgQVIw7teKol/xR1dSzN/+1zO1J9UHk9/dWUU
sb5lGa/AtBrIbWxS1qLuA5bgyDqxXYDZi0y/Bu1qMHYebRW37z9kvomtzBiMNX2o
SAxvr9iGPlTxTjGjRCyBVFmsbCMYLabNoL9tuuXvo+DnjFoOilTef+qePOv7ZYZX
kwUyS2eu
=FX6e
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson:
"SoC platform changes. Main theme this merge window:
- The Netx platform (Netx 100/500) platform is removed by Linus
Walleij-- the SoC doesn't have active maintainers with hardware,
and in discussions with the vendor the agreement was that it's OK
to remove.
- Russell King has a series of patches that cleans up and refactors
SA1101 and RiscPC support"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits)
ARM: stm32: use "depends on" instead of "if" after prompt
ARM: sa1100: convert to common clock framework
ARM: exynos: Cleanup cppcheck shifting warning
ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view
ARM: exynos: Only build MCPM support if used
arm: add missing include platform-data/atmel.h
ARM: davinci: Use GPIO lookup table for DA850 LEDs
ARM: OMAP2: drop explicit assembler architecture
ARM: use arch_extension directive instead of arch argument
ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading
ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB
ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB
ARM: riscpc: enable chained scatterlist support
ARM: riscpc: reduce IRQ handling code
ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc
ARM: riscpc: parse video information from tagged list
ARM: riscpc: add ecard quirk for Atomwide 3port serial card
MAINTAINERS: mvebu: Add git entry
soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh
ARM: OMAP2+: Make some variables static
...
97 lines
2.4 KiB
ArmAsm
97 lines
2.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* OMAP34xx and OMAP44xx secure APIs file.
|
|
*
|
|
* Copyright (C) 2010 Texas Instruments, Inc.
|
|
* Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
|
|
*
|
|
* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
|
|
* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
|
|
*/
|
|
|
|
#include <linux/linkage.h>
|
|
|
|
/*
|
|
* This is common routine to manage secure monitor API
|
|
* used to modify the PL310 secure registers.
|
|
* 'r0' contains the value to be modified and 'r12' contains
|
|
* the monitor API number. It uses few CPU registers
|
|
* internally and hence they need be backed up including
|
|
* link register "lr".
|
|
* Function signature : void omap_smc1(u32 fn, u32 arg)
|
|
*/
|
|
.arch armv7-a
|
|
.arch_extension sec
|
|
ENTRY(omap_smc1)
|
|
stmfd sp!, {r2-r12, lr}
|
|
mov r12, r0
|
|
mov r0, r1
|
|
dsb
|
|
smc #0
|
|
ldmfd sp!, {r2-r12, pc}
|
|
ENDPROC(omap_smc1)
|
|
|
|
/**
|
|
* u32 omap_smc2(u32 id, u32 falg, u32 pargs)
|
|
* Low level common routine for secure HAL and PPA APIs.
|
|
* @id: Application ID of HAL APIs
|
|
* @flag: Flag to indicate the criticality of operation
|
|
* @pargs: Physical address of parameter list starting
|
|
* with number of parametrs
|
|
*/
|
|
ENTRY(omap_smc2)
|
|
stmfd sp!, {r4-r12, lr}
|
|
mov r3, r2
|
|
mov r2, r1
|
|
mov r1, #0x0 @ Process ID
|
|
mov r6, #0xff
|
|
mov r12, #0x00 @ Secure Service ID
|
|
mov r7, #0
|
|
mcr p15, 0, r7, c7, c5, 6
|
|
dsb
|
|
dmb
|
|
smc #0
|
|
ldmfd sp!, {r4-r12, pc}
|
|
ENDPROC(omap_smc2)
|
|
|
|
/**
|
|
* u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs)
|
|
* Low level common routine for secure HAL and PPA APIs via smc #1
|
|
* r0 - @service_id: Secure Service ID
|
|
* r1 - @process_id: Process ID
|
|
* r2 - @flag: Flag to indicate the criticality of operation
|
|
* r3 - @pargs: Physical address of parameter list
|
|
*/
|
|
ENTRY(omap_smc3)
|
|
stmfd sp!, {r4-r11, lr}
|
|
mov r12, r0 @ Copy the secure service ID
|
|
mov r6, #0xff @ Indicate new Task call
|
|
dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
|
|
smc #1 @ Call PPA service
|
|
ldmfd sp!, {r4-r11, pc}
|
|
ENDPROC(omap_smc3)
|
|
|
|
ENTRY(omap_modify_auxcoreboot0)
|
|
stmfd sp!, {r1-r12, lr}
|
|
ldr r12, =0x104
|
|
dsb
|
|
smc #0
|
|
ldmfd sp!, {r1-r12, pc}
|
|
ENDPROC(omap_modify_auxcoreboot0)
|
|
|
|
ENTRY(omap_auxcoreboot_addr)
|
|
stmfd sp!, {r2-r12, lr}
|
|
ldr r12, =0x105
|
|
dsb
|
|
smc #0
|
|
ldmfd sp!, {r2-r12, pc}
|
|
ENDPROC(omap_auxcoreboot_addr)
|
|
|
|
ENTRY(omap_read_auxcoreboot0)
|
|
stmfd sp!, {r2-r12, lr}
|
|
ldr r12, =0x103
|
|
dsb
|
|
smc #0
|
|
ldmfd sp!, {r2-r12, pc}
|
|
ENDPROC(omap_read_auxcoreboot0)
|