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Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
119 lines
2.8 KiB
C
119 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 1999 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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* Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
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*/
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/system_misc.h>
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#include <asm/proc-fns.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "common.h"
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#include "hardware.h"
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static void __iomem *wdog_base;
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static struct clk *wdog_clk;
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static int wcr_enable = (1 << 2);
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/*
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* Reset the system. It is called by machine_restart().
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*/
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void mxc_restart(enum reboot_mode mode, const char *cmd)
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{
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if (!wdog_base)
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goto reset_fallback;
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if (!IS_ERR(wdog_clk))
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clk_enable(wdog_clk);
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/* Assert SRS signal */
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imx_writew(wcr_enable, wdog_base);
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/*
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* Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
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* written twice), we add another two writes to ensure there must be at
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* least two writes happen in the same one 32kHz clock period. We save
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* the target check here, since the writes shouldn't be a huge burden
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* for other platforms.
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*/
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imx_writew(wcr_enable, wdog_base);
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imx_writew(wcr_enable, wdog_base);
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/* wait for reset to assert... */
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mdelay(500);
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pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
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/* delay to allow the serial port to show the message */
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mdelay(50);
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reset_fallback:
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/* we'll take a jump through zero as a poor second */
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soft_restart(0);
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}
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void __init mxc_arch_reset_init(void __iomem *base)
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{
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wdog_base = base;
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wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
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if (IS_ERR(wdog_clk))
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pr_warn("%s: failed to get wdog clock\n", __func__);
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else
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clk_prepare(wdog_clk);
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}
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#ifdef CONFIG_SOC_IMX1
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void __init imx1_reset_init(void __iomem *base)
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{
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wcr_enable = (1 << 0);
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mxc_arch_reset_init(base);
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}
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#endif
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#ifdef CONFIG_CACHE_L2X0
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void __init imx_init_l2cache(void)
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{
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void __iomem *l2x0_base;
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struct device_node *np;
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unsigned int val;
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np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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if (!np)
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return;
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l2x0_base = of_iomap(np, 0);
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if (!l2x0_base)
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goto put_node;
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* Configure the L2 PREFETCH and POWER registers */
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val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
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val |= L310_PREFETCH_CTRL_DBL_LINEFILL |
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L310_PREFETCH_CTRL_INSTR_PREFETCH |
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L310_PREFETCH_CTRL_DATA_PREFETCH;
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/* Set perfetch offset to improve performance */
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val &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
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val |= 15;
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writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
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}
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iounmap(l2x0_base);
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put_node:
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of_node_put(np);
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}
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#endif
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